DSP Code Optimization Utilizing Memory Addressing Operation (Special Section on Digital Signal Processing)
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概要
- 論文の詳細を見る
In this paper, DSPs, of which memory addresses are pointed by special purpose registers (address registers: ARs),are assumed, and metheds to derive an efficient memory access pattern for those DSPs are proposed. In such DSPs, programmers must take care for efficient allocation of memory space as well as effective use of registers, in order to derive an efficient program in the sense of execution period. In this paper, memory addresses and AR update operations are modeled by an access graph, and a novel memory allocation method is presented. This method removes cycles and forks in a given access graph, and decides an address location of variables in memory space with less overhead. In order to utileze multiple ARs, methods to assign variables into ARs are investigated. The proposed methods are applied to the compiler for DSP56000 and are proved to be effetive by generated codes for several examples.
- 社団法人電子情報通信学会の論文
- 1996-08-25
著者
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IIMURO Satoshi
Department of Biostatistics, School of Public Health, The University of Tokyo
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Iimuro Satoshi
Department Of Physical Electronics Faculty Of Engineering Tokyo Institute Of Technology
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Iimuro Satoshi
Department Of Biostatistics School Of Public Health The University Of Tokyo
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FUJII Nobuo
Department of Electrical and Electronic Systems Engineering, Faculty of Information Science and Elec
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SUGINO Nobuhiko
Department of Physical Electronics, Faculty of Engineering, Tokyo Institute of Technology
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NISHIHARA Akinori
Department of Physical Electronics, Faculty of Engineering, Tokyo Institute of Technology
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Sugino Nobuhiko
Department Of Information Processing Interdisciplinary Graduate School Of Science And Engineering To
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Sugino Nobuhiko
Department Of Physical Electronics Faculty Of Engineering Tokyo Institute Of Technology
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Nishihara Akinori
Department Communications And Integrated Systems Tokyo Institute Of Technology
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Fujii Nobuo
Department Of Civil Engineering
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Nishihara Akinori
Department Of Physical Electronics Faculty Of Engineering Tokyo Institute Of Technology
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Fujii Nobuo
Department Of Physical Electronics Faculty Of Engineering Tokyo Institute Of Technology
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