Sugino Nobuhiko | Department Of Information Processing Interdisciplinary Graduate School Of Science And Engineering To
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概要
- SUGINO Nobuhikoの詳細を見る
- 同名の論文著者
- Department Of Information Processing Interdisciplinary Graduate School Of Science And Engineering Toの論文著者
関連著者
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Sugino Nobuhiko
Department Of Information Processing Interdisciplinary Graduate School Of Science And Engineering To
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Nishihara Akinori
Department Communications And Integrated Systems Tokyo Institute Of Technology
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IIMURO Satoshi
Department of Biostatistics, School of Public Health, The University of Tokyo
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Iimuro Satoshi
Department Of Physical Electronics Faculty Of Engineering Tokyo Institute Of Technology
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Iimuro Satoshi
Department Of Biostatistics School Of Public Health The University Of Tokyo
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FUJII Nobuo
Department of Electrical and Electronic Systems Engineering, Faculty of Information Science and Elec
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SUGINO Nobuhiko
Department of Physical Electronics, Faculty of Engineering, Tokyo Institute of Technology
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NISHIHARA Akinori
Department of Physical Electronics, Faculty of Engineering, Tokyo Institute of Technology
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Sugino Nobuhiko
Department Of Physical Electronics Faculty Of Engineering Tokyo Institute Of Technology
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Nishihara Akinori
Center For Research And Development Of Educational Technology Tokyo Institute Of Technology
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Fujii Nobuo
Department Of Civil Engineering
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KOGURE Nakaba
Department of Physical Electronics, Faculty of Engineering, Tokyo Institute of Technology
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Kogure Nakaba
Department Of Physical Electronics Faculty Of Engineering Tokyo Institute Of Technology
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MIYAZAKI Hironobu
Department of Physical Electronics, Faculty of Engineering, Tokyo Institute of Technology
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Nishihara Akinori
Department Of Physical Electronics Faculty Of Engineering Tokyo Institute Of Technology
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Miyazaki Hironobu
Sheet & Coil Div. Yawata Works Nippon Steel
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Fujii Nobuo
Department Of Physical Electronics Faculty Of Engineering Tokyo Institute Of Technology
著作論文
- DSP Code Optimization Utilizing Memory Addressing Operation (Special Section on Digital Signal Processing)
- Memory Allocation Method for Indirect Addressing DSPs with ±2 Update Operations
- DSP Code Optimization Methods Utilizing Addressing Operations at the Codes without Memory Accesses