Memory Allocation Method for Indirect Addressing DSPs with ±2 Update Operations
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概要
- 論文の詳細を見る
Digital signal processors (DSPs) usually employ indirect addressing using an address register (AR) to indicate their memory addresses, which often introduces overhead codes in AR updates for next memory accesses. In this paper, AR update scheme is extended such that address can be efficiently modified by ±2 in addition to conventional ±1 updates. An automatic address allocation method of program variables for this new addressing model is presented. The method formulates program variables and AR modifications by a graph, and extracts a maximum chained triangle graph, which is accessed only by AR ±1 and ±2 operations, so that the estimated number of overhead codes is minimized. The proposed methods are applied to a DSP compiler, and memory allocations derived for several examples are compared with memory allocations by other methods.
- 社団法人電子情報通信学会の論文
- 1998-03-25
著者
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Sugino Nobuhiko
Department Of Information Processing Interdisciplinary Graduate School Of Science And Engineering To
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Nishihara Akinori
Department Communications And Integrated Systems Tokyo Institute Of Technology
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KOGURE Nakaba
Department of Physical Electronics, Faculty of Engineering, Tokyo Institute of Technology
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Kogure Nakaba
Department Of Physical Electronics Faculty Of Engineering Tokyo Institute Of Technology
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