Jitter Tolerant Continuous-Time Sigma-Delta A-D Converter Employing In-Loop Low-Pass Filter(<Special Section>Analog Circuit Techniques and Related Topics)
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概要
- 論文の詳細を見る
This paper proposes a jitter tolerant continuous-time sigma-delta A-D converter structure as well as its design method. This method transforms a conventionally designed sigma-delta A-D converter into a jitter tolerant one. Jitter tolerance is provided by the modified feedback signal paths and a consequently inserted digital LPF This method is applicable independently of a system order and the other specifications.
- 社団法人電子情報通信学会の論文
- 2007-02-01
著者
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Takagi Shigetaka
Tokyo Institute of Technology
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FUJII Nobuo
Tokyo Institute of Technology
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Fujii Nobuo
Tokyo Inst. Of Technol. Tokyo Jpn
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KOBAYASHI Daisuke
Tokyo Institute of Technology
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Takagi Shigetaka
Tokyo Inst. Of Technol. Tokyo Jpn
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