A Partial-Ground-Plane (PGP) Silicon-on-Insulator (SOI) Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) for Deep Sub-0.1μm Channel Regime
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概要
- 論文の詳細を見る
- Publication Office, Japanese Journal of Applied Physics, Faculty of Science, University of Tokyoの論文
- 2001-04-01
著者
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Omura Y
Electronics High-technology Research Center And Faculty Of Engineering Kansai University
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Omura Y
Ntt Lsi Laboratories
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Omura Yasuhisa
High-technology Research Center And Faculty Of Engineering Kansai University
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Omura Yasuhisa
Electronics Department Kansai University
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Omura Yasuhisa
High-technology Research Center
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YANAGI Shin-ichiro
High-Technology Research Center and Faculty of Engineering, Kansai University
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NAKAKUBO Atsushi
High-Technology Research Center and Faculty of Engineering, Kansai University
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Nakakubo A
Electronics High-technology Research Center And Faculty Of Engineering Kansai University
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Yanagi S
Kansai Univ.
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Yanagi Shin-ichiro
High-technology Research Center
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