Nakakubo A | Electronics High-technology Research Center And Faculty Of Engineering Kansai University

スポンサーリンク

概要

• NAKAKUBO Atsushiの詳細を見る
• 同名の論文著者
• Electronics High-technology Research Center And Faculty Of Engineering Kansai Universityの論文著者

関連著者

• Omura Y

  Electronics High-technology Research Center And Faculty Of Engineering Kansai University

• Omura Y

  Ntt Lsi Laboratories

• Omura Yasuhisa

  Electronics Department Kansai University

• Nakakubo A

  Electronics High-technology Research Center And Faculty Of Engineering Kansai University

• Nakakubo Atsushi

  Electronics, High-Technology Research Center and Faculty of Engineering, Kansai University

• YANAGI Shin-ichiro

  High-Technology Research Center and Faculty of Engineering, Kansai University

• Yanagi S

  Kansai Univ.

• 中辻 博

  京都大学大学院工学研究科

• Omura Yasuhisa

  High-technology Research Center And Faculty Of Engineering Kansai University

• Nakatsuji Hiroshi

  Electronics High-technology Research Center And Faculty Of Engineering Kansai University

• Nakatsuji Hiroshi

  Department Of Synthetic Chemistry And Biological Chemistry Faculty Of Engineering Kyoto University

• Omura Yasuhisa

  High-technology Research Center

• NAKAKUBO Atsushi

  High-Technology Research Center and Faculty of Engineering, Kansai University

• Yanagi Shin-ichiro

  High-technology Research Center

もっと見る 閉じる

著作論文

• Quantum mechanical effect in temperature dependence of threshold voltage of extremely thin SOI MOSFETs
• Quantization Effect in Temperature Dependence of Threshold Voltage of Extremely-Thin SOI MOSFETs
• A Partial-Ground-Plane (PGP) Silicon-on-Insulator (SOI) Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) for Deep Sub-0.1μm Channel Regime
• Proposal of a Partial-Ground-Plane (PGP) Silicon-on-Insulator (SOI) MOSFET for Deep sub-0.1-μm Channel Regime
• Proposal of a Partial-Ground-Plane(PGP) Silicon-on-Insulator(SOI) MOSFET for Deep Sub-100-nm Channel Regime

スポンサーリンク