Yanagi Shin-ichiro | High-technology Research Center
スポンサーリンク
概要
関連著者
-
Yanagi Shin-ichiro
High-technology Research Center
-
Omura Yasuhisa
High-technology Research Center
-
Omura Y
Electronics High-technology Research Center And Faculty Of Engineering Kansai University
-
Omura Y
Ntt Lsi Laboratories
-
Omura Yasuhisa
High-technology Research Center And Faculty Of Engineering Kansai University
-
Omura Yasuhisa
Electronics Department Kansai University
-
YANAGI Shin-ichiro
High-Technology Research Center and Faculty of Engineering, Kansai University
-
NAKAKUBO Atsushi
High-Technology Research Center and Faculty of Engineering, Kansai University
-
Nakakubo A
Electronics High-technology Research Center And Faculty Of Engineering Kansai University
-
Yanagi S
Kansai Univ.
-
Omura Yasuhisa
High-technology Research Center Department Of Electronics Kansai University
-
Omura Yasuhisa
Faculty Engineering
-
Nakakubo Atsushi
Electronics, High-Technology Research Center and Faculty of Engineering, Kansai University
-
Yanagi Shin-ichiro
High-technology Research Center Department Of Electronics Kansai University
著作論文
- A Partial-Ground-Plane (PGP) Silicon-on-Insulator (SOI) Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) for Deep Sub-0.1μm Channel Regime
- Proposal of a Partial-Ground-Plane(PGP) Silicon-on-Insulator(SOI) MOSFET for Deep Sub-100-nm Channel Regime
- Consideration of Performance Limitation of Sub-100-nm Double-Gate Silicon-on-Insulator (SOI) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) : Electnical Properties of Condensed Malter
- Reconsideration of Off-Leakage Current Estimation of Sub -100-nm SOI MOSFETs and Device Selection for Applications