Consideration of Performance Limitation of Sub-100-nm Double-Gate Silicon-on-Insulator (SOI) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) : Electnical Properties of Condensed Malter
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概要
- 論文の詳細を見る
- 社団法人応用物理学会の論文
- 2002-10-01
著者
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Omura Yasuhisa
High-technology Research Center Department Of Electronics Kansai University
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Omura Yasuhisa
High-technology Research Center
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Yanagi Shin-ichiro
High-technology Research Center Department Of Electronics Kansai University
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Yanagi Shin-ichiro
High-technology Research Center
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- Analysis of Interface Microstructure Evolution in Separation by IMplanted OXygen(SIMOX)Wafers
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- Consideration of Performance Limitation of Sub-100-nm Double-Gate Silicon-on-Insulator (SOI) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) : Electnical Properties of Condensed Malter
- Reconsideration of Off-Leakage Current Estimation of Sub -100-nm SOI MOSFETs and Device Selection for Applications
- Quantitative Evaluation of Quantum Mechanical Influence on Flat-Band Capacitance of Poly-Si/SiO_2/Si Substrate System and the Impact of Oxide Charge Density
- Analysis of Thin Oxide Growth Mechanisms in Partial-Pressure Rapid-Thermal Oxidation of Silicon
- Compact Equivalent-Circuit Model for Snap-Back Phenomena in Ultra-Thin SOI MOSFET's and Practical Guideline for ESD-Protection Device Design
- Two-Dimensional Quantization Effect on Indirect Tunneling in an Insulated-Gate Lateral pn-Junction Structure with a Thin Silicon Layer
- Significant initial stress under cyclic application of constant-current stress to thin SiO_2 films
- Significant Impact of Transport Noise Enhancement in Scaled-Down MOSFET's
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