Analysis of Si-Ge Source Structure in 0.15 μm SOI MOSFETs Using Two-Dimensional Device Simulation
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概要
- 論文の詳細を見る
- 1996-02-01
著者
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Matsuzawa Kazuya
Advanced Lsi Technology Laboratory Corporate Research & Development Center Toshiba Corporation
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Matsuzawa Kazuya
Ulsi Research Laboratories R & D Center Toshiba Corporation
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Nishiyama A
Advanced Lsi Technology Laboratory Toshiba Corporation
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Arisumi Osamu
Feram Development Alliance Semiconductor Company Toshiba Corp.
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ARISUMI Osamu
ULSI Research Laboratories, R & D Center, Toshiba Corporation
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SHIGYO Naoyuki
ULSI Research Laboratories, R & D Center, Toshiba Corporation
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TERAUCHI Mamoru
ULSI Research Laboratories, R & D Center, Toshiba Corporation
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NISHIYAMA Akira
ULSI Research Laboratories, R & D Center, Toshiba Corporation
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YOSHIMI Makoto
ULSI Research Laboratories, R & D Center, Toshiba Corporation
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Shigyo Naoyuki
Ulsi Research Laboratories R & D Center Toshiba Corporation
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Shigyo Naoyuki
Ulsi Device Engineering Laboratory Toshiba Corporation
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Yoshimi Makoto
Advanced Semiconductor Devices Research Laboratories Toshiba Corporation
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Yoshimi M
R&d Center Kawasaki‐shi Jpn
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Terauchi M
Advanced Semiconductor Devices Research Laboratories Toshiba Corporation
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Yoshimi Makoto
Ulsi Research Laboratories R&d Center Toshiba Corporation
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Nishiyama Akira
Ulsi Research Laboratories R & D Center Toshiba Corporation
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- Analysis of Si-Ge Source Structure in 0.15 μm SOI MOSFETs Using Two-Dimensional Device Simulation
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