Sugihara Kazuyoshi | Process & Manufacturing Engineering Center Semiconductor Company Toshiba Corp.

スポンサーリンク

概要

関連著者

もっと見る

著作論文

Improved Electron-Beam/Deep-Ultraviolet Intralevel Mix-and-Match Lithography with 100 nm Resolution
Fabrication of Micro-Marks for Electron-Beam Lithography
Fabrication Process of Character Projection Mask for EB Lithography
Recovery of SEM Image by In-Situ Cleaning of Contaminated Objective Aperture
Reduction of Electron Beam Drift Caused by Deflecting Electrode by Downflow Cleaning Process
Edge Roughness Study of Chemically Amplified Resist in Low-Energy Electron-Beam Lithography Using Computer Simulation
Contamination Charging up Effect in a Variably Shaped Electron Beam Writer
A Dual-Gate Complementary Metal-Oxide-Semiconductor Technology with Novel Self-Aligned Pocket Implantation which Takes Advantage of Elevated Source/Drain Configurations
Self-Aligned Pocket Implantation into Elevated Source/Drain MOSFETs for Reduction of Junction Capacitance and Leakage Current
Parasitic Resistance Reduction in Deep Submicron Dual-Gate Transistors with Partially Elevated Source/Drain Extension Regions Fabricated by Complementary Metal-Oxide-Semiconductor Technologies
Lithography Simulator for Electon Beam/Deep UV Intra-Level Mix & Match
Advantage of Shallow Trench Isolation over Local Oxidation of Silicon on Alignment Tolerance
Charge-reducing Effect of Chemically Amplified Resist in Electron-Beam Lithography
Noticeable Enhancement of Edge Effect in Short Channel Characteristics of Trench-Isolated MOSFETs
Anomalous Gate Length Dependence of Threshold Voltage of Trench-Isolated Metal Oxide Semiconductor Field Effect Transistors
Narrow-Channel Metal Oxide Semiconductor Field Effect Transistor (MOSFET)Isolated by an Ultra-Fine Trench

もっと見る

スポンサーリンク