Synthesis of an Insulator-Coated Metal Tip with a 50-nm-Diameter Conductive Region at the Apex
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概要
- 論文の詳細を見る
We present a method for the fabrication of a passivated probe with a nanoscale conductive region. For an electrochemically sharpened W tip wholly coated with inner PtIr and outer SiO2 thin layers by pulsed laser deposition, the local removal of the SiO2 layer from the tip apex was achieved by electron-beam irradiation in a transmission electron microscope. The bared area of the tip apex was less than 50 nm in diameter. Scanning tunneling microscope imaging using the tip revealed that the active area at the apex was conductive. Moreover, the passivated tip showed stability to a biological culture solution.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2007-04-15
著者
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Tomita Kazuhiro
Division Of Electrical Electronic And Information Engineering Graduate School Of Engineering Osaka U
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Murata Yuya
Division Of Electrical Electronic And Information Engineering Graduate School Of Engineering Osaka U
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Kimura Takehiko
Division Of Electrical Electronic And Information Engineering Graduate School Of Engineering Osaka U
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Motoyoshi Kenji
Division Of Electrical Electronic And Information Engineering Graduate School Of Engineering Osaka U
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Konishi Hirofumi
Division Of Electrical Electronic And Information Engineering Graduate School Of Engineering Osaka U
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Lee Jung-goo
Research Center For Ultra-high Voltage Electron Microscopy Osaka University
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Mori Hirotaro
Research Center For Ultra-high Voltage Electron Microscopy Osaka University
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Kishida Masaru
Division Of Electrical Electronic And Information Engineering Graduate School Of Engineering Osaka U
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Honda Shin-ichi
Division Of Electrical Electronic And Information Engineering Graduate School Of Engineering Osaka U
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Katayama Mitsuhiro
Division Of Electrical Electronic And Information Engineering Graduate School Of Engineering Osaka U
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Tomita Kazuhiro
Division of Electrical, Electronic and Information Engineering, Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871, Japan
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Konishi Hirofumi
Division of Electrical, Electronic and Information Engineering, Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871, Japan
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Kimura Takehiko
Division of Electrical, Electronic and Information Engineering, Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871, Japan
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