A Low-Power High-Speed Rail-to-Rail Class-B Output Buffer for TFT-LCD Source Driver

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概要

• 論文の詳細を見る

• This paper presents a low-power high-speed rail-to-rail class-B output buffer for TFT-LCD source driver. The proposed output buffer uses a complementary differential input stage, that can obtain rail-to-rail input and output operation capability. Due to the conventional compensation method always adopts a miller capacitance, which has a area disadvantage. In this work, the frequency compensation is realized only by using a compensation resistor to introduce a new zero for stability. This buffer amplifier employs simple comparators to sense the transients of the input to turn on the output transistors, thus draws little current while static, but has a large driving capability while transient. Two auxiliary driving transistors are used to improve the speed. The proposed output buffer was simulated in a 0.35-μm CMOS process. With 3.3-V supply and 600-pF output load, the simulated quiescent current is 3.29μA. The settling times of 1.88μs for rising and 1.75μs for falling edges within 0.2%.

• 社団法人電子情報通信学会の論文
• 2006-09-28

著者

• Huang Wei-lun

  Graduate School Of Information Production And Systems Waseda University

• CHIOU Yu-Zung

  Department of Electronics Engineering Southern Taiwan University of Technology

• Pan Jun

  Graduate School Of Information Production And Systems Waseda University

• INOUE Yasuaki

  Graduate School of Information, Production and Systems, Waseda University

• LIANG Zheng

  Graduate School of Information, Production and Systems, Waseda University

• Chiou Yu-zung

  Department Of Electrical Engineering National Cheng Kung University

• Liang Zheng

  Graduate School Of Information Production And Systems Waseda University

• Inoue Yasuaki

  Graduate School Of Information Production And Systems Waseda University

• Pan Jun

  Graduate School Of Agriculture Hokkaido University

• Inoue Yasuaki

  Graduate School Of Ips Waseda University

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