Magnetic and Electrical Properties of Vacuum-Deposited CdCr_2Se_4 Thin Film

スポンサーリンク

概要

• 論文の詳細を見る

• Polycrystalline CdCr_2Se_4 thin films with a thickness of 6-10 μm were synthesized by vacuum deposition and subsequent heat treatments on silicon and insulating substrates. N-type CdCr_2Se_4 films were also obtained through a heat treatment in the indium vapor. Magnetic properties such as the Curie and Curie-Weiss temperature, the saturation magnetization, and the line width of ferromagnetic-resonance absorption, were measured. For samples subjected to a reverse vapor transport process, their magnetic properties are close to those of bulk crystals. Electrical properties of n-type thin films on insulating substrates have temperature dependence different from that of bulk crystals. Their negative magnetoresistance has a maximum at temperatures much lower than Tc. The longitudinal magnetoresistance effect is larger than the transverse effect. The results are discussed in relation with the available models.

• 社団法人応用物理学会の論文
• 1976-01-05

著者

• SUGANO Takuo

  Department of Electrical and Electronic Engineering, Toyo University

• Iizuka Tetsuya

  Department Of Electronic Engineering Faculty Of Engineering University Of Tokyo:(present Address) Re

• Iizuka Tetsuya

  Department Of Electronic Engineering And Vlsi Design And Education Center (vdec) The University Of T

関連論文

• The in vitro osteogenetic characteristics of primary osteoblastic cells from a rabbit calvarium
• Beating of the Shubnikov-de Haas Oscillations in GaAs/AlGaAs Quantum-Dot Arrays
• Advantages of the Asymmetric Tunnel Barrier for High-Density Integration of Single Electron Devices ( Quantum Dot Structures)
• Single Electron Device with Asymmetric Tunnel Barriers
• A Perspective on Next-Generation Silicon Devices
• Exact Minimum-Width Transistor Placement for Dual and Non-dual CMOS Cells(Circuit Synthesis, VLSI Design and CAD Algorithms)
• Yield-Optimal Layout Synthesis of CMOS Logic Cells by Wiring Fault Minimization(VLSI Design Technology and CAD)
• High Speed Layout Synthesis for Minimum-Width CMOS Logic Cells via Boolean Satisfiability(Physical Design)(VLSI Design and CAD Algorithms)
• Electron Mobility in In_Ga_xAs Epitaxial Layer
• Calculations of Energy Levels of Oxygen and Silicon Vacancies at the Si-SiO_2 Interface
• Fabrication of Josephson Weak Links Using Electron Beam Lithography and Ion-Etching, and Proposal of a New Single Flux Quantum Logic : C-2: JOSEPHSON DEVICES
• Interface Analysis of Al_2O_3/InP Structure Prepared by Molecular Beam Deposition
• Fabrication of Step-Edge Junctions on the Concave or Convex Side of YBa_2Cu_3O_ Film
• Magnetic and Electrical Properties of Vacuum-Deposited CdCr_2Se_4 Thin Film
• Studies on Chemically Etched Silicon, Gallium Arsenide, and Gallium Phosphide Surfaces by Auger Electron Spectroscopy
• Ordered Structure and Ion Migration in Silicon Dioxide Films
• Hall Mobility of Electrons in Silicon Surface Inversion Layers
• Galvanomagnetic Effects in Silicon Surface Inversion Layers
• Mobility of Magnetic Domain Wall of Strip Domain in Garnet Crystal : Computer Simulation and Measurement : B-2: BUBBLE DEVICES (II)
• Optical Properties of Vacuum-Deposited CdCr_2Se_4 Thin Film
• Effects of PAs_xN_y Deposition Conditions and the Cd Concentration in the Substrates on the Characteristics of In_Ga_As Metal-Insulator-Semiconductor Field Effect Transistors : Special Section : Solid State Devices and Materials 2 : III-V Comp
• Deep Level Transient Spectroscopy of Bulk Traps and Interface States in Si MOS Diodes
• Epitaxial Growth of SiC Film on Silicon Substrate and Its Crystal Structure
• Fabrication of Bi_2Sr_2CaCu_2O_x High T_c Superconducting Film with H_2O Assisted Metalorganic Chemical Vapor Deposition
• Vapor Deposition of Silicon Nitride Film on Silicon and Properties of MNS Diodes
• Physical and Technological Limits in Size of Semiconductor Devices : E-2: PHYSICAL AND TECHNOLOGICAL LIMITS OF HIGH-DENSITY INTERGRATION
• Forward Characteristics of Si Schottky Diodes
• Plasma-Oxidized Tunnel Barrier of Nb/Nb Josephson Junctions with Copper Interlayer
• Scattering of Electrons by Potential Clusters in Ternary Alloy Semiconductor
• Proposal for Criterion on Deformation of III-V Ternary Alloy Crystal Lattice
• Cascaded Time Difference Amplifier with Differential Logic Delay Cell
• All-Digital On-Chip Monitor for PMOS and NMOS Process Variability Utilizing Buffer Ring with Pulse Counter
• 1.0ps Resolution Time-to-Digital Converter Based-On Cascaded Time-Difference-Amplifier Utilizing Differential Logic Delay Cells
• Chemical Deposition of Mo on Si
• Magnetic Modulation of Critical Current in MB DC-SQUID
• Fabrication of Si-Mo-Si Three Layer Structure and Its Current Transfer Characteristics
• Anodization of Silicon in RF Induced Oxygen Plasma : A-2: MOS DEVICES/BASIC ASPECTS
• Hot Electron-Phonon Interaction in Metals
• Defect-Free Reactive Ion Etching of Silicon by SiF_4/Cl_2 Plasma
• Thermodynamical Calculation and Experimental Confirmation of the Density of Hole Traps in SiO_2 Films
• Beating of the Shubnikov-de Haas Oscillations in GaAs/AlGaAs Quantum-Dot Arrays
• Cascade Model for Reduction of Field-Effect Mobility of Electrons in Lightly Doped Channel of Submicron Gate Si Thin-Film Field-Effect Transistors
• Advantages of the Asymmetric Tunnel Barrier for High-Density Integration of Single Electron Devices

もっと見る 閉じる

スポンサーリンク