Kinoshita Kozo | Faculty Of Engineering Osaka University

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概要

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著作論文

Throughput Analysis of ARQ Schemes in Dialogue Communication over Half-Duplex Line
Traffic Analysis of the Stop-and-Wait ARQ over a Markov Error Channel
Channel-Grouping Methods on Go-Back-N ARQ Scheme in Multiple-Parallel-Channel System
A Novel ATPG Method for Capture Power Reduction during Scan Testing(Dependable Computing)
A Per-Test Fault Diagnosis Method Based on the X-Fault Model(Dependable Computing)
A New Method for Low-Capture-Power Test Generation for Scan Testing(Dependable Computing)
On Design for I_-Based Diagnosability of CMOS Circuits Using Multiple Power Supplies(Computer Components)
Testing of k-FR Circuits under Highly Observable Condition
Efficient Methods for Guided-Probe Diagnosis (Special Issue on VLSI Testing and Testable Design)
Synthesis of Testable Sequential Circuits with Reduced Checking Sequences (Special Issue on VLSI Testing and Testable Design)
Reduction of the Target Fault List and Fault Simulation Method for Crosstalk Faults in Clock-Delayed Domino Circuits(Special Issue on Test and Verification of VLSI)
IDDQ Test Time Reduction by High Speed Charging of Load Capacitors of CMOS Logic Gates(Special Issue on Test and Verification of VLSI)
A Reduced Scan Shift Method for Sequential Circuit Testing (Special Section on VLSI Design and CAD Algorithms)
Throughput Performances of ARQ Protocols Operating over Generalized Two-State Markov Error Channel
Efficient Guided-Probe Fault Location Method for Sequential Circuits
Acceleration Techniques of Multiple Fault Test Generation Using Vector Pair Analysis
Retiming for Sequential Circuits with a Specified Initial State and Its Application to Testability Enhancement

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