Miyase Kohei | Faculty Of Computer Science And Systems Engineering Kyushu Institute Of Technology

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著作論文

High Launch Switching Activity Reduction in At-Speed Scan Testing Using CTX : A Clock-Gating-Based Test Relaxation and X-Filling Scheme
A Study of Capture-Safe Test Generation Flow for At-Speed Testing
On Detection of Bridge Defects with Stuck-at Tests
A Novel Per-Test Fault Diagnosis Method Based on the Extended X-Fault Model for Deep-Submicron LSI Circuits
Scan Tree Design: Test Compression with Test Vector Modification (特集:システムLSIの設計技術と設計自動化)
A Novel ATPG Method for Capture Power Reduction during Scan Testing(Dependable Computing)
A Per-Test Fault Diagnosis Method Based on the X-Fault Model(Dependable Computing)
Don't Care Identification and Statistical Encoding for Test Data Compression(Test Generation and Compaction)(Test and Verification of VLSI)
A GA-Based X-Filling for Reducing Launch Switching Activity toward Specific Objectives in At-Speed Scan Testing
Distribution-Controlled X-Identification for Effective Reduction of Launch-Induced IR-Drop in At-Speed Scan Testing

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