Electrical Characteristics of Si Single-Electron Transistor Based on Multiple Islands
スポンサーリンク
概要
- 論文の詳細を見る
We investigated the electrical characteristics specifically associated with cotunneling and quantum effects of single-electron transistors (SETs) with three geometrically defined islands. Clear Coulomb oscillation and negative differential conductance were observed. The drain current for the peaks and valleys of the Coulomb oscillation was measured as a function of temperature and drain voltage. Consequently, it was found that the valley current was well described by the inelastic cotunneling theory at temperatures above 40 K in the low-drain-voltage region; on the other hand, elastic cotunneling dominantly contributed to the valley current in the low-temperature and low-drain-voltage region. However, for a high gate voltage, the SET behaved as a single-island device. This is probably because the three islands were electrically enlarged and merged into a single island owing to the high applied gate voltage.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2007-09-30
著者
-
Nakajima Anri
Research Center For Nanodevices And Systems Hiroshima University
-
OHKURA Kensaku
Research Center for Nanodevices and Systems (RCNS), Hiroshima University
-
Kitade Tetsuya
Research Center For Nanodevices And Systems Hiroshima University
-
Ohkura Kensaku
Research Center for Nanodevices and Systems, Hiroshima University, 1-4-2 Kagamiyama, Higashi-Hiroshima, Hiroshima 739-8527, Japan
関連論文
- Improvement of mobility and NBTI reliability in MOSFETs with ALD-Si-nitride/SiO_2 stack dielectrics and p^+-poly-Si gate
- Bipolar Voltage Pulse Induced Current : A Means for Reliable Extraction of Interface Trap Distribution in Ultrathin Oxides MOS Structures
- Fabrication Technologies for Double-SiO_2-Barrier Metal-Oxide-Semiconductor Transistor with a Poly-Si Dot
- Calculation of Electrical Properties of Novel Double-Barrier Metal Oxide Semiconductor Transistors
- Carrier Mobility in Metal-Oxide-Semiconductor Field Effect Transistor with Atomic-Layer-Deposited Si-Nitride Gate Dielectrics
- Conduction Mechanism in Extremely Thin Poly-Si Wires : Width Dependence of Coulomb Blockade Effect
- Low-Temperature Selective Deposition of Silicon by Time-Modulation Exposure of Disilane and Formation of Silicon Nanowires
- Fabrication of Si Nanowire Field-Effect Transistor for Highly Sensitive, Label-Free Biosensing
- Mobility and Number Fluctuations in MOS Structures
- Influence of bulk bias on NBTI of pMOSFETs with ultrathin SiON gate dielectric
- Modified Direct-Current Current-Voltage Method for Interface Trap Density Extraction in Metal-Oxide-Semiconductor Field-Effect-Transistor with Tunneling Gate Dielectrics at High Temperature
- Room Temperature Operation of an Exclusive-OR Circuit Using a Highly-Doped Si Single-Electron Transistor
- Self-Limiting Atomic-Layer Selective Deposition of Silicon Nitride by Temperature-Controlled Method
- Application of Highly-Doped Si Single-Electron Transistors to an Exclusive-NOR Operation
- Silicon Single-Electron Memory Having in-Plane Dot with Double Gates
- Improvement in Mobility and Negative-Bias Temperature Instability in Metal–Oxide–Semiconductor Field-Effect Transistors with Atomic-Layer-Deposited Si–Nitride/SiO2 Stack Dielectrics
- In-Plane Grain Orientation Alignment of Polycrystalline Silicon Films by Normal and Oblique-Angle Ion Implantations
- Organic Contamination Dependence of Process-Induced Interface Trap Generation in Ultrathin Oxide Metal Oxide Semiconductor Transistors
- Mobility and Number Fluctuations in MOS Structures
- Electrical Characteristics of Si Single-Electron Transistor Based on Multiple Islands
- Atomic Layer Deposition of HfO2 Using Hf[N(C2H5)2]4 and H2O
- Conduction Path Fluctuation in Silicon Two-Dimensional Tunnel Junction Array
- Monte Carlo Simulation of the Two-Dimensional Site Percolation Problem for Designing Sensitive and Quantitatively Analyzable Field-Effect Transistors
- Atomic Layer Deposition of HfO2 and Si Nitride on Ge Substrates
- Modified Direct-Current Current-Voltage Method for Interface Trap Density Extraction in Metal-Oxide-Semiconductor Field-Effect-Transistor with Tunneling Gate Dielectrics at High Temperature
- Annealing Temperature Dependence on Nickel–Germanium Solid-State Reaction
- Application of Highly-Doped Si Single-Electron Transistors to an Exclusive-NOR Operation