A Josephson Full Adder Circuit Using Four-Junction Logic (4JL) Gates : C-2: III-V CRYSTALS/JOSEPHSON JUNCTION
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概要
- 論文の詳細を見る
- 社団法人応用物理学会の論文
- 1983-02-28
著者
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NAKAGAWA Hiroshi
Electrotechical Laboratory (ETL)
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Takada Susumu
Electrotechnical Laboratory
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Takada S
Saitama Univ. Urawa‐shi Jpn
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HAYAKAWA Hisao
Electrotechnical Laboratory
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Hayakawa H
Nagoya Univ. Nagoya Jpn
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Nakagawa Hiroshi
Graduate School Of Materials Science Nara Institute Of Science And Technology
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Sogawa Eiichi
Electrotechnical Laboratory
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