Effect of Gate Voltage on Hot-Carrier-Induced On-Resistance Degradation in High-Voltage n-Type Lateral Diffused Metal–Oxide–Semiconductor Transistors
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概要
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The phenomenon and mechanism of hot-carrier-induced on-resistance ($R_{\text{on}}$) degradation for the n-type lateral diffused metal–oxide–semiconductor (MOS) transistors stressed under various gate voltages ($V_{\text{g}}$) are investigated. $R_{\text{on}}$ degradation of the device is found to be attributed to the interface state ($N_{\text{it}}$) generation in the N- drift region. Moreover, $R_{\text{on}}$ degradation is almost identical for the devices stressed under medium $V_{\text{g}}$ and high $V_{\text{g}}$, despite the fact that bulk current of the device is much greater at high $V_{\text{g}}$ bias. Such an anomalous $R_{\text{on}}$ degradation is suggested to be the result of two combined factors: the magnitude of impact ionization rate and $N_{\text{it}}$ generation efficiency.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2008-04-25
著者
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Wu Kuo-ming
Taiwan Semiconductor Manufacturing Company
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LIU C.
Taiwan Semiconductor Manufacturing Company
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HSU S.
Taiwan Semiconductor Manufacturing Company
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Chen Jone
Institute Of Microelectronics & Department Of Electrical Engineering National Cheng Kung Univers
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Chen Shiang-yu
Institute Of Microelectronics Department Of Electrical Engineering National Cheng Kung University
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Lee J.
Institute Of Medical Science And Department Of Pediatrics Hallym University
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Wu Kuo-Ming
Taiwan Semiconductor Manufacturing Company, Hsinchu 300, Taiwan
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Hsu S.
Taiwan Semiconductor Manufacturing Company, Hsinchu 300, Taiwan
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Chen Shiang-Yu
Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan
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Chen Jone
Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan
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