Embedded Process and Characterization Analysis of Discrete Capacitor in Organic-Base Substrate

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概要

• 論文の詳細を見る
• 2007-09-19

著者

• YEH Wen-Kuan

  Department of Electrical Engineering, National University of Kaohsiung

• Yeh Wen-kuan

  Department Of Electrical Engineering National University Of Kaohsiung

• JAHJA Endruw

  Department of Electronic Engineering, National University of KaoHsiung

• WU Sung-Mao

  Department of Electrical Engineering, National University of Kaohsiung

• WANG Jui-Wen

  Business Promotion Department, ASE Electronics, Inc.

• LAI Zhi-Zhang

  Department of Electrical Engineering, National University of Kaohsiung

• Jahja Endruw

  Department Of Electrical Engineering National University Of Kaohsiung

• Wang Jui-wen

  Business Promotion Department Ase Electronics Inc.

• Wu Sung-mao

  Department Of Electrical Engineering National University Of Kaohsiung

• Lai Zhi-zhang

  Department Of Electrical Engineering National University Of Kaohsiung

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• Width Effect on Hot-Carrier-Induced Degradation for 90nm Partially Depleted SOI CMOSFETs
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• The Impact of Pad Test-Fixture for De-embedding on Radio-Frequency MOSFETs
• Low-Frequency Noise in Partially Depleted SOI MOSFETs Operating from Linear Region to Saturation Region at Various Temperatures
• An Efficient Improvement for Barrier Effect of W-filled Contact
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• Hot-Carrier-Induced Degradation on 0.1 μm Partially Depleted Silicon-On-Insulator Complementary Metal-Oxide-Semiconductor Field-Effect-Transistor
• New Observations on Hot-Carrier Degradation in 0.1 μm Silicon-on-Insulator n-Type Metal Oxide Semiconductor Field Effect Transistors : Semiconductors
• Efficient Suppression of Substrate Noise Coupling in Complementary Metal-Oxide-Semiconductor Field-Effect-Transistor Technology
• The Reliability Characteristics of Wafer-Level Chip-Scale Package under Various Current Stressing
• Embedded Process and Characterization Analysis of Discrete Capacitor in Organic-Base Substrate
• Impacts of Layout Dimensions and Ambient Temperatures on Silicon Based On-Chip RF Interconnects
• Efficient Mobility Enhancement Engineering on 65 nm Fully Silicide Complementary Metal–Oxide–Semiconductor Field-Effect-Transistors Using Second Contect Etch Stop Layer Process
• A Study of Relationship of Wafer Breakage vs. Wafer Edge Analysis
• Elucidating the Effects of Current Stress History on Reliability Characteristics by Dynamic Analysis
• Reliability and Characteristics of Wafer-Level Chip-Scale Packages under Current Stress
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• Hot-Carrier-Induced Degradation on 0.1 μm Partially Depleted Silicon-On-Insulator Complementary Metal-Oxide-Semiconductor Field-Effect-Transistor
• Low-Frequency Noise in Partially Depleted SOI MOSFETs Operating from Linear Region to Saturation Region at Various Temperatures
• Investigation of the Relationship between Whole-Wafer Strength and Control of Its Edge Engineering
• An Efficient Improvement for Barrier Effect of W-filled Contact
• Systematic Analysis and Modeling of On-Chip Spiral Inductors for Complementary Metal Oxide Semiconductor Radio Frequency Integrated Circuits Applications

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