A Study of Relationship of Wafer Breakage vs. Wafer Edge Analysis

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概要

• 論文の詳細を見る
• 2006-09-13

著者

• Yeh Wen-kuan

  Department Of Electrical Engineering National University Of Kaohsiung

• Chen Sheng-hsiung

  Department Of Electrical Engineer Tung Fang Institute Of Technology

• CHEN Shen-Li

  Department of Electronic Engineering, National United University

• Chen Shen-li

  Department Of Electronic Engineering National United University

関連論文

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• An Efficient Mobility Enhancement Engineering on 65nm FUSI CMOSFETs using a Second CESL Process
• Systematic Analysis and Modeling of On-Chip Spiral Inductors for CMOS RFIC Application
• Mobility Modulation Technology Impact on Device Performance and Reliability for sub-90nm SOI CMOSFETs
• The Impact of Body-Potential on Hot-Carrier-Induced Device Degradation for 90nm Partially-Depleted SOI nMOSFETs
• Width Effect on Hot-Carrier-induced Degradation for 90nm Partially Depleted SOI CMOSFET
• The Impact of Pad Test-Fixture for De-embedding on Radio-Frequency MOSFETs
• Fabrication and Characterization of Diamond-Clad Silicon Field Emitter Arrays
• An Efficient Improvement for Barrier Effect of W-Filled Contact
• Hot-Carrier-Induced Degradation on 0.1 μm Partially Depleted Silicon-On-Insulator Complementary Metal-Oxide-Semiconductor Field-Effect-Transistor
• New Observations on Hot-Carrier Degradation in 0.1 μm Silicon-on-Insulator n-Type Metal Oxide Semiconductor Field Effect Transistors : Semiconductors
• The Reliability Characteristics of Wafer-Level Chip-Scale Package under Various Current Stressing
• Embedded Process and Characterization Analysis of Discrete Capacitor in Organic-Base Substrate
• Impacts of Layout Dimensions and Ambient Temperatures on Silicon Based On-Chip RF Interconnects
• Efficient Mobility Enhancement Engineering on 65 nm Fully Silicide Complementary Metal–Oxide–Semiconductor Field-Effect-Transistors Using Second Contect Etch Stop Layer Process
• A Study of Relationship of Wafer Breakage vs. Wafer Edge Analysis
• Elucidating the Effects of Current Stress History on Reliability Characteristics by Dynamic Analysis
• Reliability and Characteristics of Wafer-Level Chip-Scale Packages under Current Stress
• Stress Technology Impact on Device Performances and Reliability for $\langle100\rangle$ Sub-90 nm Silicon-on-Insulator Complementary Metal–Oxide–Semiconductor Field-Effect-Transistors
• Width Effect on Hot-Carrier-Induced Degradation for 90 nm Partially Depleted SOI CMOSFETs
• Hot-Carrier-Induced Degradation on 0.1 μm Partially Depleted Silicon-On-Insulator Complementary Metal-Oxide-Semiconductor Field-Effect-Transistor
• Low-Frequency Noise in Partially Depleted SOI MOSFETs Operating from Linear Region to Saturation Region at Various Temperatures
• Investigation of the Relationship between Whole-Wafer Strength and Control of Its Edge Engineering
• An Efficient Improvement for Barrier Effect of W-filled Contact
• Systematic Analysis and Modeling of On-Chip Spiral Inductors for Complementary Metal Oxide Semiconductor Radio Frequency Integrated Circuits Applications

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