Fabrication of Deep Sub-$\mu$m Narrow-Channe1 Si-MOSFET's with Twofold-Gate Structures
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概要
- 論文の詳細を見る
Deep sub-$\mu$m narrow-channel Si metal-oxide-semiconductor field-effect transistors(Si-MOSFFT's) are fabricated using conventional LSI processes together with electron beam lithography. The device comprises a twofold-gate structure in which a narrow gate is covered with a wide gate. With this structure, effective channel widths can be narrower than those achieved by lithography. Peak-and-valley structures are found in transconductance at low temperatures. They are thought to originate in quasi-one-dimensional subbands.
- INSTITUTE OF PURE AND APPLIED PHYSICSの論文
- 1989-10-20
著者
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Okazaki Shinji
Central Research Lab. Hitachi Ltd.
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Yoshimura Toshiyuki
Central Research Laboratory Hitachi Ltd.
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ICHIGUCHI Tsuneo
Central Research Laboratory, Hitachi, Ltd
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Matsuoka Hideyuki
Central Research Laboratory Hitachi Ltd.
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Takeda Eiji
Central Research Laboratory
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Matsuoka Hideyuki
Central Research Laboratory, Hitachi Ltd., Kokubunji, TOKYO 185 JAPAN
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Igura Yasuo
Central Research Laboratory, Hitachi Ltd., Kokubunji, TOKYO 185 JAPAN
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Ichiguchi Tsuneo
Central Research Laboratory, Hitachi Ltd., Kokubunji, TOKYO 185 JAPAN
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Yoshimura Toshiyuki
Central Research Laboratory, Hitachi Ltd., Kokubunji, TOKYO 185 JAPAN
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