A Robust Array Architecture for a Capacitorless MISS Tunnel-Diode Memory(Integrated Electronics)
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概要
- 論文の詳細を見る
With the aim of applying a MISS tunnel-diode cell to a high-density RAM, we studied its problems and developed three circuit technologies to solve them. The first, a standby-voltage control scheme, reduces standby currents and increases the signal current by 3.4 times compared to the conventional one. The second, a hierarchical bit-line structure, reduces the number of memory cells in a bit-line without increasing the number of sense amplifiers. The third, a twin-dummy-cell technique, generates a proper reference signal to discriminate read currents. These technologies enable a capacitorless MISS diode cell with an effective cell area of 6F^2 (F: minimum feature size) to be applied to a high-density RAM.
- 社団法人電子情報通信学会の論文
- 2003-09-01
著者
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Sakata Takeshi
Central Research Laboratory Hitachi Ltd.
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Sakata Takeshi
Central Research Lab. Hitachi Ltd.
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SEKIGUCHI Tomonori
Central Research Laboratory, Hitachi, Ltd.
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HANZAWA Satoru
Central Research Laboratory, Hitachi, Ltd.
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Hanzawa Satoru
Central Research Laboratory Hitachi Ltd.
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MATSUOKA Hideyuki
Central Research Laboratory, Hitachi, Ltd.
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Matsuoka Hideyuki
Central Research Laboratory Hitachi Ltd.
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Sekiguchi Tomonori
Central Research Laboratory Hitachi Ltd.
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