N-channel MOSFETs with In-situ Silane-Passivated Gallium Arsenide Channel and CMOS-Compatible Palladium-Germanium Contacts
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概要
- 論文の詳細を見る
- 2007-09-19
著者
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SAMUDRA Ganesh
Silicon Nano Device Lab., Dept. of Electrical and Computer Engineering, National University of Singa
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YEO Yee-Chia
Silicon Nano Device Lab., Dept. of Electrical and Computer Engineering, National University of Singa
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Samudra Ganesh
Silicon Nano Device Lab. Dept. Of Electrical And Computer Engineering National University Of Singapo
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Samudra Ganesh
Silicon Nano Device Lab. Department Of Electrical And Computer Engineering National University Of Si
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Hoe Keat-mun
Institute Of Microelectronics (ime)
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Yeo Yee-chia
Silicon Nano Device Lab. Dept. Of Electrical And Computer Engineering National University Of Singapo
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Yeo Yee-chia
Silicon Nano Device Lab. Dept. Of Electrical & Computer Engineering National University Of Singa
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Yeo Yee-chia
Silicon Nano Device Lab (sndl) Ece Department National University Of Singapore
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CHIN Hock-Chun
Silicon Nano Device Lab., Dept. of Electrical and Computer Engineering, National University of Singa
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ZHU Ming
Silicon Nano Device Lab., Dept. of Electrical and Computer Engineering, National University of Singa
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Zhu Ming
Silicon Nano Device Lab. Dept. Of Electrical & Computer Engineering National University Of Singa
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Chin Hock-chun
Silicon Nano Device Lab. Dept. Of Electrical And Computer Engineering National University Of Singapo
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Samudra Ganesh
Silicon Nano Device Lab Dept. Of Ece National University Of Singapore (nus)
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Samudra Ganesh
Silicon Nano Device Lab. Department Of Electrical And Computer Engineering National University Of Si
関連論文
- Silicon Strain-Transfer-Layer (STL) and Graded Source/Drain Stressors for Enhancing the Performance of Silicon-Germanium Channel P-MOSFETs
- N-channel MOSFETs with In-situ Silane-Passivated Gallium Arsenide Channel and CMOS-Compatible Palladium-Germanium Contacts
- Contact Technology employing Nickel-Platinum Germanosilicide Alloys for P-Channel FinFETs with Silicon-Germanium Source and Drain Stressors
- Novel Extended-Pi Shaped Silicon-Germanium (eII-SiGe) Source/Drain Stressors for Strain and Performance Enhancement in P-Channel FinFETs
- Strained N-channel FinFETs with High-stress Nickel Silicide-Carbon Contacts and Integration with FUSI Metal Gate Technology
- A Double-Gate Tunneling Field-Effect Transistor with Silicon-Germanium Source for High-Performance, Low Standby Power, and Low Power Technology Applications
- A Physics-based Compact Model for I-MOS Transistors
- Material and Electrical Characterization of Nickel Germanide for p-channel Germanium Schottky Source/Drain Transistors
- Effectiveness of Aluminum Incorporation in Nickel Silicide and Nickel Germanide Metal Gates for Work Function Reduction
- Sub-30nm P-channel Schottky Source/Drain FinFETs : Integration of Pt_3Si FUSI Metal Gate and High-κ Dielectric
- Sub-30nm Strained P-Channel FinFETs with Condensed SiGe Source/Drain Stressors
- Thermal Stability of Metal Gate Work Functions
- Study of Mobility in Strained Silicon and Germanium Ultra Thin Body MOSFETs
- Dynamic Bias-Temperature Instability in Ultrathin SiO_2 and HfO_2 Metal-Oxide-Semiconductor Field Effect Transistors and Its Impact on Device Lifetime
- Pulsed Laser Irradiation of Silicon-Germanium-on-Insulator (Si_Ge_OI) Substrates for Strain Relaxation and Defect Reduction
- Strained SiGe-On-Insulator N-MOSFET with Silicon Source/Drain for Drive Current Enhancement
- Concept of Strain-Transfer-Layer and Integration with Graded Silicon–Germanium Source/Drain Stressors for p-Type Field Effect Transistor Performance Enhancement
- Double-Spacer Impact-ionization MOS Transistor : Characterization and Analysis
- Schottky Barrier Height Modulation for Nickel Silicide on n-Si (100) using Antimony (Sb) Segregation
- Device Physics and Performance Optimization of Impact-Ionization Metal–Oxide–Semiconductor Transistors formed using a Double-Spacer Fabrication Process
- Strain Relaxed High Quality Silicon–Germanium-on-Insulator Substrates Formed by Pulsed Laser Irradiation Technology
- Device Design and Scalability of a Double-Gate Tunneling Field-Effect Transistor with Silicon–Germanium Source
- Erbium silicided Schottky Source/Drain Silicon Nanowire N-Metal–Oxide–Semiconductor Field-Effect Transistors
- Sub-30 nm Strained p-Channel Fin-Type Field-Effect Transistors with Condensed SiGe Source/Drain Stressors
- Novel Extended-Pi Shaped Silicon–Germanium Source/Drain Stressors for Strain and Performance Enhancement in p-Channel Tri-Gate Fin-Type Field-Effect Transistor
- Effectiveness of Aluminum Incorporation in Nickel Silicide and Nickel Germanide Metal Gates for Work Function Reduction
- Strained Silicon–Germanium-on-Insulator n-Channel Transistor with Silicon Source and Drain Regions for Performance Enhancement
- Dynamic Bias-Temperature Instability in Ultrathin SiO2 and HfO2 Metal-Oxide-Semiconductor Field Effect Transistors and Its Impact on Device Lifetime