Takewaki Toshiyuki | Nec Electronics Corporation

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著作論文

Time-Dependent Dielectric Breakdown Characterization of 90- and 65-nm-Node Cu/SiOC Interconnects with Via Plugs
Characterizing Film Quality and Electromigration Resistance of Giant-Grain Copper Interconnects (Special Issue on Sub-Half Micron Si Device and Process Technologies)
Accurate Modeling Method for Cu Interconnect
A Robust Embedded Ladder-Oxide/Cu Multilevel Interconnect Technology for 0.13μm Complementary Metal Oxide Semiconductor Generation
Chip-Level Performance Improvement Using Triple Damascene Wiring Design Concept for the 0.13μm CMOS Generation and Beyond(Novel Device Architectures and System Integration Technologies)
Multilevel Aluminum Dual-Damascene Interconnects for Process-Step Reduction in 0.18 μm ULSIs
Multilevel Aluminum Dual-Damascene Interconnects (Al-DDI) for Process-Step Reduction in 0.18um-ULSIs

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