Experimental Demonstration of Capacitor-Coupled Resonant Tunneling Logic Gates for Ultra-short Gate-delay Operation

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概要

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• The capacitor-coupled monostable-bistable transition logic element (C2MOBILE) is an extension of the high-speed logic gate MOBILE based on the negative differential resistance of the resonant tunneling diodes. The C2MOBILE uses a transient current through the coupling capacitor to transmit signals between gates, and is expected to operate with an extremely short gate delay time. In this paper, basic operations of the C2MOBILE are demonstrated with the circuits fabricated on InP substrates. The circuits tested here are the 2- and 3-stage logic circuits and the AND/OR gate. The gate delay time was estimated to be around 1 ps for these circuits. A much shorter gate delay time close to 100 fs should be possible with the sophisticated circuit design and fabrication process.

• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
• 2003-11-15

著者

• KISHIMOTO Shigeru

  Graduate School of Engineering, Nagoya University

• MIZUTANI Takashi

  Graduate School of Engineering, Nagoya University

• TANAKA Tetsuro

  Graduate School of Engineering ,Nagoya University

• Ohno Yutaka

  Graduate School Of Engineering Nagoya University

• Maezawa Koichi

  Graduate School Of Engineering Nagoya University

• Mizutani Takashi

  Graduate School of Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya-shi, Aichi 464-8603, Japan

• Tanaka Tetsuro

  Graduate School of Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya-shi, Aichi 464-8603, Japan

• Kishimoto Shigeru

  Graduate School of Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya-shi, Aichi 464-8603, Japan

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