18-GHz Clock Distribution Using a Coupled VCO Array(Analog and Communications,<Special Section>Low-Power, High-Speed LSIs and Related Technologies)
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概要
- 論文の詳細を見る
This paper describes an 18-GHz coupled VCO array for low jitter and low phase deviation clock distribution. To reduce the skew, jitter and power consumption associated with clock distribution, the clock is generated by a one-dimensional VCO array in which the oscillating nodes of adjacent VCOs are directly connected with wires. The effects of the wire length and number of unit VCOs in the array are discussed. Both 4-unit and a 2-unit VCO arrays for delivering a clock signal to a 16:1 multiplexor were designed and fabricated in a 90-nm CMOS process. The frequency range of the 4-unit VCO array was 16GHz to 18.5GHz while each unit VCO consumed 2mA.
- 社団法人電子情報通信学会の論文
- 2007-04-01
著者
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KURODA Tadahiro
Keio University, Dept. of Electronics and Electrical Engineering
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Kuroda Tadahiro
Keio Univ.
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TAMURA Hirotaka
Fujitsu Laboratory Ltd.
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HAMADA Takayuki
Fujitsu Laboratory Ltd.
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OGAWA Junji
Fujitsu Laboratory Ltd.
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SHIBASAKI Takayuki
Keio University
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KANDA Kouichi
Fujitsu Laboratories LTD
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YAMAGUCHI Hisakatsu
Fujitsu Laboratories LTD
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Tamura Hirotaka
Fujitsu Laboratories Ltd.
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