System LSI : Challenges and Opportunities (System LSIs and Microprocessors, <Special Section> VLSI Design Technology in the Sub-100nm Era)
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概要
- 論文の詳細を見る
Scaling of CMOS Integrated Circuit is becoming difficult, due mainly to rapid increase in power dissipation. How will the semiconductor technology and industry develop? This paper discusses challenges and opportunities in system LSI from three levels of perspectives: transistor level (physics), IC level (electronics), and business level (economics).
- 社団法人電子情報通信学会の論文
著者
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KURODA Tadahiro
Keio University, Dept. of Electronics and Electrical Engineering
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Kuroda Tadahiro
Keio Univ.
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