Hierarchical Fault Tracing for VLSIs with Bi-directional Busses from CAD Layout Data in the CAD-Linked EB Test System
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概要
- 論文の詳細を見る
A hierarchical fault tracing method for VLSIs with bi-directional busses from CAD layout data in the CAD-linked electron beam test system is described. When fault tracing reaches at a cell connected to a bi-directional bus, our method is able to judge the direction of the signal flow, input or output, by using waveforms acquired by an EB tester, in a consistent manner independently of circuit functions as with a previously proposed tracing method for circuits without bi-directional busses.
- 社団法人電子情報通信学会の論文
- 1997-03-25
著者
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Miura K
Faculty Of Engineering Gunma University
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FUJIOKA Hiromu
Department of Information Systems Engineering, Faculty of Engineering, Osaka University
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Nakamae K
Osaka Univ. Suita‐shi Jpn
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Nakamae Koji
Faculty Of Engineering Osaka University
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Fujioka H
Osaka Univ. Suita‐shi Jpn
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Fujioka Hiromu
Faculty Of Engineering Osaka University
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MIURA Katsuyoshi
Faculty of Engineering, Osaka University
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