Fujioka Hiromu | Faculty Of Engineering Osaka University

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著作論文

An Analysis of the Economics of the VLSI Development Including Test Cost
Effect of 300mm Wafer Transition and Test Processing Logistics on VLSI Manufacturing Final Test Process Efficiency and Cost
Effect of Express Lots on Production Dispatching Rule Scheduling and Cost in VLSI Manufacturing Final Test Process
Hierarchical Fault Tracing for VLSIs with Bi-directional Busses from CAD Layout Data in the CAD-Linked EB Test System
Automatic Transistor-Level Performance Fault Tracing by Successive Circuit Extraction from CAD Layout Data for VLSI in the CAD-Linked EB Test System
Matching of DUT Interconnection Pattern with CAD Layout in CAD-Linked Electron Beam Test System (Special Issue on LSI Failure Analysis)
Automatic Tracing of Transistor-Level Performance Faults with CAD-Linked Electron Beam Test System
LSI Failure Analysis with CAD-Linked Electron Beam Test System and Its Cost Evaluation (Special Issue on LSI Failure Analysis)
Efficient Dynamic Fault Imaging by Fully Utilizing CAD Data in CAD-Linked Electron Beam Test System (Special Issue on LSI Failure Analysis)

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