Creation of Strained and Relaxed SiGe films simultaneously through Ge condensation on SOI

スポンサーリンク

概要

論文の詳細を見る
2005-09-13

著者

関連論文

Dopant Segregated Pt-Germanide Schottky S/D p-MOSFET with HfO_2/TaN gate on Strained Si-SiGe channel
Germanium Out-Diffusion in HfO_2 and its Impact on Electrical Properties
Bendable High-Performance Electronic Devices (Active Transistor, High-Density Interconnect and Passive-MIM Capacitors) on Flexible Organic-Substrate
Ultra-Narrow Silicon Nanowire (-3nm) Gate-All-Around MOSFETs
Overcoming Challenges in Metal Gate Etching for Sub-45nm Technology Node
Creation of Strained and Relaxed SiGe films simultaneously through Ge condensation on SOI
Fully-depleted ultra narrow (-10nm) body Gate-All-Around CMOS transistors
Behavior of Effective Work Function in Metal/High-K Gate Stack under High Temperature Process
Strained Ge-rich SiGe Nanowire pFETs with High-κ/Metal Gate Fabricated using Germanium Condensation Technique
Si Quantum Dot TFT Nonvolatile Memory for System-On-Panel Applications
Impacts of Body Contact Structures on SOI NMOSFET DC, RF, and 1/f Noise Characteristics
Transport and Back-Gated Field Effect Characteristics of Si Nanowires Formed by Stress-Limited Oxidation
Growth and Characterization of Germanium on Insulator (GOI) from Sputtered Ge by Novel Single and Dual Necking techniques
A Novel Approach to fabricate High Ge content SiGe on Insulator from Amorphous SiGe deposited on SOI wafers
Integration of 0.45-mm^2 On-Chip-Antenna (OCA) with High Output Power for 2.45GHz RFID Tag
Novel Extended-Pi Shaped Silicon-Germanium (eII-SiGe) Source/Drain Stressors for Strain and Performance Enhancement in P-Channel FinFETs
Strained N-channel FinFETs with High-stress Nickel Silicide-Carbon Contacts and Integration with FUSI Metal Gate Technology
Visible Light Emission from Controlled α-Si/SiN Multi-layer Structures
Sub-30nm Strained P-Channel FinFETs with Condensed SiGe Source/Drain Stressors
Practical Solutions to Enhance EWF Tunability of Ni FUSI Gates on HfO_2
Highly Manufacturable CMOSFETs with Single High-k (HfLaO) and Dual Metal Gate Integration Process
CMOS Compatible Si-Nanowire Inverter Logic Gate for Low Power Applications
Device Performance and Reliability Considerations of Biaxially Strained Si by Wafer-Bonding-Technology
Electrical Sensing of Calcium Ions using Silicon Nanowire Array
A Novel Approach to Fabricate-120nm Thick Fully Relaxed Ge-on-Insulator
A Novel Dual-Metal Gate Integration Process for Sub-1nm EOT HfO_2 CMOS Devices
MOVPE Prepared ZnO/Si Heterojunction Diodes with Dual Functions : Light-Emission and UV Photo-Detection
Memory Effect of Device Based on a Conjugated Donor-Acceptor Copolymer
High quality Si_Ge_x nanowire and its application to MOSFET integrated with HfO_2/TaN/Ta gate stack
Enhanced Thermal Stability of Nickel Germanide with Ultrathin Ti Layer
Pt-germanide Formed by Laser Annealing and Its Application for Schottky Source/Drain MOSFET Integrated with TaN/CVD-HfO_2/Ge Gate Stack
Modeling and Characterization of the On-chip Interconnects
Self-Heating Induced Germanium Outdiffusion and Non-Local Channel Degradation in the Strained-Si/SiGe N-MOSFET subjected to Channel Hot-Electron Stress
Label Free Electrical Detection of Single Nucleotide Polymorphisms using Nanowire Biosensors
Current Status of Fast Ignition Related Experiments and the Prospect
Sub-30 nm Strained p-Channel Fin-Type Field-Effect Transistors with Condensed SiGe Source/Drain Stressors
Novel Extended-Pi Shaped Silicon–Germanium Source/Drain Stressors for Strain and Performance Enhancement in p-Channel Tri-Gate Fin-Type Field-Effect Transistor

もっと見る

スポンサーリンク