Modeling and Characterization of the On-chip Interconnects
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概要
- 論文の詳細を見る
- 2006-09-13
著者
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KUMAR R.
Institute of Microelectronics
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Rustagi S.
Institute Of Microelectronic Singapore Science Part Ii
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SUN Sheng
Institute of Microelectronic, Singapore Science Part II
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MOUTHAAN K.
Department of Electrical & Computer Engineering, National University of Singapore
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WONG T.
School of Electrical & Electronic Engineering, Nanyang Technological University
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Mouthaan K.
Department Of Electrical & Computer Engineering National University Of Singapore
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Wong T.
School Of Electrical & Electronic Engineering Nanyang Technological University
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Sun Sheng
Institute Of Microelectronic Singapore Science Part Ii
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- Growth and Characterization of Germanium on Insulator (GOI) from Sputtered Ge by Novel Single and Dual Necking techniques
- A Novel Approach to fabricate High Ge content SiGe on Insulator from Amorphous SiGe deposited on SOI wafers
- CMOS Compatible Si-Nanowire Inverter Logic Gate for Low Power Applications
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