Enhanced Thermal Stability of Nickel Germanide with Ultrathin Ti Layer
スポンサーリンク
概要
- 論文の詳細を見る
- 2007-09-19
著者
-
Zhu Shiyang
Semiconductor Process Technology Institute Of Microelectronics
-
LO G.
Institute of Microelectronics
-
KWONG D.
Institute of Microelectronics
-
YU M.
Institute of Microelectronics
-
YU M.
Semiconductor Process Technology, Institute of Microelectronics
-
LO G.
Semiconductor Process Technology, Institute of Microelectronics
-
KWONG D.
Semiconductor Process Technology, Institute of Microelectronics
関連論文
- Bendable High-Performance Electronic Devices (Active Transistor, High-Density Interconnect and Passive-MIM Capacitors) on Flexible Organic-Substrate
- Ultra-Narrow Silicon Nanowire (-3nm) Gate-All-Around MOSFETs
- Overcoming Challenges in Metal Gate Etching for Sub-45nm Technology Node
- Creation of Strained and Relaxed SiGe films simultaneously through Ge condensation on SOI
- Fully-depleted ultra narrow (-10nm) body Gate-All-Around CMOS transistors
- Strained Ge-rich SiGe Nanowire pFETs with High-κ/Metal Gate Fabricated using Germanium Condensation Technique
- Si Quantum Dot TFT Nonvolatile Memory for System-On-Panel Applications
- Impacts of Body Contact Structures on SOI NMOSFET DC, RF, and 1/f Noise Characteristics
- Transport and Back-Gated Field Effect Characteristics of Si Nanowires Formed by Stress-Limited Oxidation
- Growth and Characterization of Germanium on Insulator (GOI) from Sputtered Ge by Novel Single and Dual Necking techniques
- A Novel Approach to fabricate High Ge content SiGe on Insulator from Amorphous SiGe deposited on SOI wafers
- Integration of 0.45-mm^2 On-Chip-Antenna (OCA) with High Output Power for 2.45GHz RFID Tag
- Visible Light Emission from Controlled α-Si/SiN Multi-layer Structures
- Practical Solutions to Enhance EWF Tunability of Ni FUSI Gates on HfO_2
- Highly Manufacturable CMOSFETs with Single High-k (HfLaO) and Dual Metal Gate Integration Process
- CMOS Compatible Si-Nanowire Inverter Logic Gate for Low Power Applications
- Device Performance and Reliability Considerations of Biaxially Strained Si by Wafer-Bonding-Technology
- Electrical Sensing of Calcium Ions using Silicon Nanowire Array
- A Novel Approach to Fabricate-120nm Thick Fully Relaxed Ge-on-Insulator
- MOVPE Prepared ZnO/Si Heterojunction Diodes with Dual Functions : Light-Emission and UV Photo-Detection
- Memory Effect of Device Based on a Conjugated Donor-Acceptor Copolymer
- High quality Si_Ge_x nanowire and its application to MOSFET integrated with HfO_2/TaN/Ta gate stack
- Enhanced Thermal Stability of Nickel Germanide with Ultrathin Ti Layer
- Integration of Dual Channels MOSFET on Defect-Free, Tensile-Strained Germanium on Silicon
- Silicon Nanowire Schottky Barrier NMOS Transistors