High Speed, Low Power Programming in 0.17μm Channel Length NOR-type Floating Gate Flash Memory Cell Free of Drain Turn-On Effects

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概要

• 論文の詳細を見る
• Japan Society of Applied Physicsの論文
• 2004-02-01

著者

• QUAN Wu-yun

  Korea institute for Advanced Study

• KIM Dae

  Korea institute for Advanced Study

• Park Young

  School Of Mechanical Engineering Yonsei University

• KIM Bomsoo

  Korea Institute for Advanced Study

• Park Y

  School Of Electrical Engineering And Computer Science And Isrc Seoul National University

• Min Hong

  School Of Electrical Engineering And Computer Science And Isrc Seoul National University

• BAEK Chang-Ki

  School of Electrical Engineering and Computer Science and Nano-Systems Institute (NSI-NCRC), Seoul N

• SONG Yunheub

  Memory Division, Semiconductor Business, Samsung Electronics Company, Ltd.

• Kim D

  Korea Institute For Advanced Study

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• Design Technique for Ramped Gate Soft-Programming in Over-Erased NOR Type Flash EEPROM Cells
• High Speed, Low Power Programming in 0.17μm Channel Length NOR-type Floating Gate Flash Memory Cell Free of Drain Turn-On Effects

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