Direct Tunneling from Source to Drain in Nanometer-Scale Silicon Transistors

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概要

• 論文の詳細を見る
• Publication Office, Japanese Journal of Applied Physics, Faculty of Science, University of Tokyoの論文
• 2003-02-15

著者

• KAWAURA Hisao

  Fundamental and Environmental Research Laboratories, NEC Corporation

• Baba Toshio

  Fundamental And Environmental Research Laboratories Nec Corporation

• Kawaura Hisao

  Fundamental Research Laboratories Nec Corporation

• Baba T

  Fundamental Research Laboratories Nec Corporation

関連論文

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• Surface Tunnel Transistors with Multiple Interband Tunnel Junctions (Special Issue on New Concept Device and Novel Architecture LSIs)
• First Observation of Negative Differential Resistance in Surface Tunnel Transistors
• Self-Aligned Surface Tunnel Transistors Fabricated by a Regrowth Technique
• Resolution of 1:1 Electron Stepper with Patterned Cold Cathode
• Improved Negative Differential Resistance Characteristics in Surface Tunnel Transistors
• Quantum-efficiency Dependence of the Spin Polarization of Photoemission from a GaAs-AlGaAs Superlattice
• A High Polarization and High Quantum Efficiency Photocathode Using a GaAs -AlGaAs Superlattice
• Highly Polarized Electron Source Using InGaAs-GaAs Strained-Layer Superlattice
• Highly Enhanced Speed and Efficiency of Si Nano-Photodiode with a Surface-Plasmon Antenna
• Si Nano-Photodiode with a Surface Plasmon Antenna
• Surface Tunnel Transistor: Gate-Controlled Lateral Interband Tunneling Device
• High Performance (AlAs/n-GaAs Superlattice)/GaAs 2DEGFETs with Stabilized Threshold Voltage
• Elimination of Persistent Photoconductivity and Improvement in Si Activation Coefficient by Al Spatial Separation from Ga and Si in Al-Ga-As:Si Solid System : a Novel Short Period AlAs/n-GaAs Superlattice
• DX Center-Like Trap in Selectively Si-Doped AlAs/GaAs Superlattices
• Thermal Stability of a Short Period AlAs/n-GaAs Superlattice
• The Local-Environment-Dependent DX Centers : Evidence for the Single Energy Level with a Specified Configuration
• Mechanism of Layer-by-Layer Oxidation of Si(001)Surfaces by Two-Dimensional Oxide-Island Nucleation at SiO_2/Si Interfaces
• Mechanism of Layer-by-Layer Oxidation of Si (001) Surfaces Proceeding by Two-Dimensional Oxide-Island Nucleation at SiO_2/Si Interfaces
• Simulation of Intrinsic Bistability in Resonant Tunneling Diodes
• Monte Carlo Simulation of Resonant Tunneling Diode
• Multiple-Valued Memory Operation Using a Single-Electron Device : a Proposal and an Experimental Demonstration of a Ten-Valued Operation
• Single-Electron Memory Fabricated from Doped Silicon-on-Insulator Film
• Hot Electron Transport in Si-MOSFETs
• Transport Properties in Sub-10-nm-gate EJ-MOSFETs
• Fabrication and Characterization of 14-nm-Gate-Length EJ-MOSFETs
• Proposal of Pseudo Source and Drain MOSFETs for Evaluating 10-nm Gate MOSFETs
• Direct Tunneling from Source to Drain in Nanometer-Scale Silicon Transistors
• 4.2 K Operation of InAlAs/InGaAs Heterojunction Bipolar Transistor
• Heavily Si-Doped GaAs and AlAs/n-GaAs Superlattice Grown by Molecular Beam Epitaxy
• Proposal for Surface Tunnel Transistors

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