The C-R Method Used for Leff Extraction and Process Optimization in Nano N/P-MOSFET's Devices

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概要

• 論文の詳細を見る

• In this paper, a modified C-V method (C-R method) is adopted to improve the nano-MOSFET device performance by optimizing the S/D engineering. Using the C-R method (the Capacitance-Ratio method), more consistent and reasonable L_eff can be extracted and the process bias (including L_ovlap and L_pb) can be exactly measured for the N/PMOS devices with halo and Ge implant process. Comparing the I-V data, those parameters can be used to analysis device characteristics under various S/D engineering conditions, and then can be used to help optimizing the nano-MOSFET devices.

• 社団法人電子情報通信学会の論文
• 2002-06-24

著者

• Chen Hsin-nan

  Institute Of Mechatronics Engineering National Taipei University Of Technology

• HUANG Heng-Sheng

  Institute of Mechatronics Engineering, National Taipei Universityof Technology

• Hu Chi-Chin

  Institute of Computer, Communication and Control, National Taipei University of Technology

• Yuen Chien-Tung

  Institute of Mechatronics Engineering, National Taipei University of Technology

• Fang Jen-Hung

  Institute of Mechatronics Engineering, National Taipei University of Technology

• Sun Jwo

  Institute of Computer, Communication and Control, National Taipei University of Technology

• Hong Garry

  Central Integration Division, United Microelectronics Corporation

• Chen J.K.

  Central R

• Hong Garry

  D Division, United Microelectronics Corporation

• Sun Jwo

  Institute Of Computer Communication And Control National Taipei

• Hong G

  Rodel‐nitta Co. Nara Jpn

• Chen J

  United Microelectronics Corp. Hsin‐chu Twn

• Hu Chi-chin

  Institute Of Computer Communication And Control National Taipei Institute Of Mechatronics Engineerin

• Huang H‐s

  National Taipei Univ. Technol. Taipei Twn

• Fang Jen-hung

  Institute Of Mechatronics Engineering National Taipei University Of Technology

• Yuen Chien-tung

  Institute Of Mechatronics Engineering National Taipei University Of Technology

• Huang Heng-sheng

  Institute Of Automation Technology National Taipei University Of Technology

• Hong Gary

  Specialty Techology Division United Microelectronics Corporation

• Huang Heng-sheng

  Institute Of Mechatronics Engineering National Taipei Universityof Technology

関連論文

• Excellent Emission Characteristics of Tunneling Oxides Formed Using Ultrathin Silicon Films for Flash Memory Devices
• A New Portrayal of Oxidation of Undoped Polycrystalline Silicon Films in a Short Duration
• A Capacitance Ratio Method Used for L_ Extraction of an Advanced Metal-Oxide-Semiconductor Device with Halo Implant
• A Modified Capacitance-Voltage Method Used for L_ Extraction and Process Monitoring in Advanced 0.15μm Complementary Metal-Oxide-Semiconductor Technology and Beyond
• The C-R Method Used for Leff Extraction and Process Optimization in Nano N/P-MOSFET's Devices
• The C-R Method Used for Leff Extraction and Process Optimization in Nano N/P-MOSFET's Devices
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• A Modified Capacitance–Voltage Method Used for $L_{\text{eff}}$ Extraction and Process Monitoring in Advanced 0.15 $\mu$m Complementary Metal-Oxide-Semiconductor Technology and Beyond
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