A Modified Capacitance–Voltage Method Used for $L_{\text{eff}}$ Extraction and Process Monitoring in Advanced 0.15 $\mu$m Complementary Metal-Oxide-Semiconductor Technology and Beyond

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概要

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• In this paper, an alternative approach for the extraction of effective channel length, $L_{\text{eff}}$, using a modified capacitance–voltage ($C$–$V$) method [the capacitance–ratio ($C$–$R$) method], which considers depletion effect compensation is proposed. In general, we define $L_{\text{eff}}=L_{\text{mask}}-\Delta L$, where $\Delta L$ is the sum of the polysilicon gate lithography bias and two times the overlap length of the polysilicon gate and source/drain (S/D) extension ($\Delta L=L_{\text{pb}}+2L_{\text{ovlap}}$). Using the modified $C$–$V$ method, more consistent and reasonable $L_{\text{eff}}$ data can be extracted as compared to those obtained using the newest current–voltage ($I$–$V$) method (shift and ratio method). In using the proposed $C$–$R$ method, we can electrically measure the exact $L_{\text{pb}}$ and $L_{\text{ovlap}}$ numbers that can both be used as process monitor parameters. The within-wafer uniformities of $L_{\text{eff}}$ (or $\Delta L$), $L_{\text{pb}}$ and $L_{\text{ovlap}}$ have also been checked among devices of various sizes. After the $L_{\text{eff}}$ is extracted, a stable S/D resistance $R_{\text{sd}}$, with $V_{\text{g}}$ independence, is determined and verified using the $I$–$V$ method. The parasitic capacitance $C_{\text{gd}}$ is another extracted parameter that is as important as $R_{\text{sd}}$ in SPICE modeling for RF complementary metal-oxide-semiconductor (CMOS) applications.

• Publication Office, Japanese Journal of Applied Physics, Faculty of Science, University of Tokyoの論文
• 2001-03-15

著者

• SHIU Jen-Shiuan

  Institute of Mechatoronic Engineering, National Taipei University of Technology

• LIN Shyh-Jye

  Institute of Mechatoronic Engineering, National Taipei University of Technology

• CHOU Jih-Wen

  Specialty Technology Division, United Microelectronics Corporation

• Hong Gary

  Specialty Technology Division United Microelectronics Corporation

• Chen Coming

  Specialty Technology Division United Microelectronics Corporation

• Huang Heng-sheng

  Institute Of Automation Technology National Taipei University Of Technology

• Lee Ryan

  Specialty Technology Division, United Microelectronics Corporation, Hsin-Chu, Taiwan, R.O.C.

• Chen Coming

  Specialty Technology Division, United Microelectronics Corporation, Hsin-Chu, Taiwan, R.O.C.

• Hong Gary

  Specialty Technology Division, United Microelectronics Corporation, Hsin-Chu, Taiwan, R.O.C.

• Huang Heng-Sheng

  Institute of Mechatronic Engineering, National Taipei University of Technology, Taipei, Taiwan, R.O.C.

• Chou Jih-Wen

  Specialty Technology Division, United Microelectronics Corporation, Hsin-Chu, Taiwan, R.O.C.

• Shiu Jen-Shiuan

  Institute of Mechatronic Engineering, National Taipei University of Technology, Taipei, Taiwan, R.O.C.

関連論文

• A Capacitance Ratio Method Used for L_ Extraction of an Advanced Metal-Oxide-Semiconductor Device with Halo Implant
• A Modified Capacitance-Voltage Method Used for L_ Extraction and Process Monitoring in Advanced 0.15μm Complementary Metal-Oxide-Semiconductor Technology and Beyond
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• Performance and Reliability Improvement of Low-Power Embedded Flash Memory with Shallow Trench Isolation Structure

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