A 40-Gb/s 8×8 ATM Switch LSI Using 0.25-μm CMOS/SIMOX(Special Issue on Multimedia, Network, and DRAM LSIs)
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概要
- 論文の詳細を見る
The switch LSI described here takes advantage of the special characteristics of fully-depleted CMOS/SIMOX devices - that is, source/drain capacitances and threshold voltages that are lower than those of conventional bulk COMS devices - to boost the I/O bit rate. The double-edge triggered MUX/DEMUX which uses a frame synchronization logic, and the active-pull-up I/O provide a 144-pin, 2.5-Gbps/pin interface on the chip. The 220-kgate rerouting banyan switching network with 110-kbit RAM operates at an internal clock frequency of 312MHz. The CMOS/SIMOX LSI consumes 8.4W when operating with a 2-V power supply, and has four times the throughput of conventional one-chip ATM switch LSIs.
- 社団法人電子情報通信学会の論文
- 1998-05-25
著者
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Ohtomo Y
Ntt System Electronics Lab. Atsugi‐shi Jpn
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Ohtomo Yusuke
Ntt System Electronics Laboratories
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Watanabe T
School Of Administration And Informatics University Of Shizuoka
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TAKEI Yuichiro
The authors are with the NTT Integrated Information and Energy Systems Laboratories
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SAWADA Hirotoshi
NTT System Electronics Laboratories
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Nogawa Masafumi
Ntt Network Service Systems Labotatories
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Inoue Jun-ichi
Ntt Electronics Corp.
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SATO Yasuhiro
NTT System Electronics Laboratories
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Ino Masayuki
Ntt Electronics Corp.
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Ino Masayuki
Ntt Electronics Co. Ltd.
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Takei Y
Department Of Electrical Engineering Nagaoka University Of Technology
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YASUDA Sadayuki
NTT Network Service Systems Labotatories
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YAMAKOSHI Kimihiro
NTT System Electronics Laboratories
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HINO Shigeki
NTT Optical Network Systems Laboratories
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TAKEI Yuichiro
NTT Integrated Information and Energy System Laboratories
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WATANABE Takumi
NTT Integrated Information and Energy System Laboratories
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TAKEYA Ken
NTT Integrated Information and Energy System Laboratories
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Hino S
Ntt Network Innovation Lab. Yokosuka‐shi Jpn
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Yasuda S
Renesas Device Design Itami‐shi Japan
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Yamakoshi K
Ntt Corp. Musashino‐shi Jpn
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Yasuda Sadayuki
NTT Network Service Systems Laboratories
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