A New Methodology for Optimal Placement of Decoupling Capacitors on Printed Circuit Board
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概要
- 論文の詳細を見る
This report describes a new methodology for the optimal placement of decoupling capacitors on the printed circuit board(PCB). This method searches the optimal position of decoupling capacitor so that the impedance characteristics at the power supply is minimized in the specified frequency range. In this method, the PCB is modeled by the PEEC method to handle the 3-dimensional structures and Krylov-subspace technique is applied to obtain efficiently the impedance characteristics in the frequency domain.
- 社団法人電子情報通信学会の論文
- 2001-12-01
著者
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ASAI Hideki
Dept. of Systems Eng., Shizuoka University
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Asai H
Shizuoka Univ. Hamamatsu‐shi Jpn
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Asai Hideki
Department Of Systems Engineering Faculty Of Engineering Shizuoka University
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Asai Hideki
Shizuoka Univ. Hamamatsu‐shi Jpn
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Asai Hideki
The Department Of Systems Engineering Faculty Of Engineering Shizuoka University
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Watanabe T
School Of Administration And Informatics University Of Shizuoka
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Watanabe Takayuki
School Of Administration And Informatics University Of Shizuoka
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KAMO Atsushi
Sony LSI Design Inc.
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KAMO Atsushi
the Department of Systems Engineering, Faculty of Engineering, Shizuoka University
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Kamo A
Sony Lsi Design Inc.
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