An Optimization System with Parallel Processing for Reducing Common-Mode Current on Electronic Control Unit
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概要
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In this paper, we propose an optimization system with parallel processing for reducing electromagnetic interference (EMI) on electronic control unit (ECU). We adopt simulated annealing (SA), genetic algorithm (GA) and taboo search (TS) to seek optimal solutions, and a Spice-like circuit simulator to analyze common-mode current. Therefore, the proposed system can determine the adequate combinations of the parasitic inductance and capacitance values on printed circuit board (PCB) efficiently and practically, to reduce EMI caused by the common-mode current. Finally, we apply the proposed system to an example circuit to verify the validity and efficiency of the system.
著者
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UNO Takanori
DENSO CORPORATION
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OKAZAKI Yuji
Graduate School of Engineering, Dept. of Systems Eng., Shizuoka University
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ASAI Hideki
Dept. of Systems Eng., Shizuoka University
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