Yamakoshi K | Ntt Corp. Musashino‐shi Jpn
スポンサーリンク
概要
関連著者
-
Yamakoshi K
Ntt Corp. Musashino‐shi Jpn
-
Ohtomo Y
Ntt System Electronics Lab. Atsugi‐shi Jpn
-
Ohtomo Yusuke
Ntt System Electronics Laboratories
-
Watanabe T
School Of Administration And Informatics University Of Shizuoka
-
TAKEI Yuichiro
The authors are with the NTT Integrated Information and Energy Systems Laboratories
-
Takei Y
Department Of Electrical Engineering Nagaoka University Of Technology
-
Ohtomo Yusuke
The Authors Are With The Ntt System Electronics Laboratories
-
WATANABE Takumi
The authors are with the NTT Integrated Information and Energy Systems Laboratories
-
YAMAKOSHI Kimihiro
The authors are with the NTT System Electronics Laboratories
-
SAWADA Hirotoshi
NTT System Electronics Laboratories
-
Nogawa Masafumi
Ntt Network Service Systems Labotatories
-
Inoue Jun-ichi
Ntt Electronics Corp.
-
SATO Yasuhiro
NTT System Electronics Laboratories
-
Ino Masayuki
Ntt Electronics Corp.
-
Ino Masayuki
Ntt Electronics Co. Ltd.
-
YASUDA Sadayuki
NTT Network Service Systems Labotatories
-
YAMAKOSHI Kimihiro
NTT System Electronics Laboratories
-
HINO Shigeki
NTT Optical Network Systems Laboratories
-
TAKEI Yuichiro
NTT Integrated Information and Energy System Laboratories
-
WATANABE Takumi
NTT Integrated Information and Energy System Laboratories
-
TAKEYA Ken
NTT Integrated Information and Energy System Laboratories
-
Hino S
Ntt Network Innovation Lab. Yokosuka‐shi Jpn
-
Yasuda S
Renesas Device Design Itami‐shi Japan
-
YAMAMOTO Kimihiro
NTT Software Laboratories
-
SUTOH Hiroki
NTT System Electronics Laboratories
-
Sutoh H
Ntt Lifestyle And Environmental Technol. Lab. Atsugi‐shi Jpn
-
Yasuda Sadayuki
NTT Network Service Systems Laboratories
著作論文
- An Effective Routing Methodology for Gb/s LSIs Using Deep-Submicron Technology
- A 40-Gb/s 8×8 ATM Switch LSI Using 0.25-μm CMOS/SIMOX(Special Issue on Multimedia, Network, and DRAM LSIs)
- A Clock Distribution Technique with an Automatic Skew Compensation Circuit