C-V and I-V Characteristics of a MOSFET with Si-Implanted Gate-SiO_2
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概要
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C-V and I-V characteristics of an n-MOSFET with Si-implanted gate-SiO_2 of 50 nm are analyzed by using a test device with large equal channel width and length of 100 μm, and discussed for realizing a large hysteresis window of threshold voltage. Interface trap densities change logarithmically from 〜3×10^<10> to 〜1×10^<12>cm^<-2>eV^<-1> as the Si-dose at 25 keV increases from zero to 3×10^<16>cm^<-2>. Threshold-voltage changes caused by keV implantations are as high as ±0.2V. Effective mobilities (subthreshold swings) change from 〜600 (〜0.10) to 〜100cm^2/V・s (〜0.26V/decade) as the Si-dose increases from 0 to 3×10^<16>cm^<-2> at 25 keV, and both parameters are related with the change of interface trap densities. There is a close relationship between the hysteresis windows of gate current and threshold voltage, and the largest threshold voltage window in a low gate voltage region is obtained for the MOSFET with Si-implantation at 25 kev/3×10^<16>cm^<-2>.
- 社団法人電子情報通信学会の論文
- 1994-06-25
著者
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OHZONE Takashi
Department of Communication Engineering, Okayama Prefectural University
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Ohzone Takashi
Department Of Communication Engineering Okayama Prefectural University
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Hori Takashi
Semiconductor Research Center Matsushita Electric Industrial Co. Ltd.
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Hori Takashi
Semiconductor Research Center Matsushita Elec. Ind. Co. Ltd.
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