LATID (Large-Angle-Tilt Implanted Drain) FETs with Buried n^-Profile for Deep-Submicron ULSIs (Special Issue on Quarter Micron Si Device and Process Technologies)

概要

論文の詳細を見る
This paper proposes a buried-LATID structure featuring a peaked vertical profile around gate edge for the n^-drain unlike the reported conventional LATID structure. As compared to the conventional LATID FETs, the deep-submicron buried-LATID FETs achieve improved circuit speed by 〜7% (>50% compared to LDD FETs) due to suppressed gate-to-drain capacitance and improved lifetime by 〜10 times (〜300 times compared to LDD FETs). The buried-LATID FETs are very promising for deep-submicron MOSFETs to achieve improved performance and hot-carrier reliability at the same time.
社団法人電子情報通信学会の論文
1994-03-25