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Semiconductor Tech. Lab., Oki Electric Industry Co., Ltd. | 論文
- Improvement of the Interface between Selectively Deposited Aluminum and Silicon by Annealing
- Modeling of Mechanism of Leakage in a Shallow p^+/n Junction Formed by Preamorphization
- Characterizing Metal-Oxide Semiconductor Structures Consisting of HfSiO_x as Gate Dielectrics using Monoenergetic Positron Beams
- Effect of Gate Materials on Generation of Interface State by Hot-Carrier Injection
- Optimum Electrode Materials for Ta_2O_5 Capacitors for High- and Low-Temperature Processes
- Formation of c-Axis-Oriented Bi_4Ti_3O_ Films with Extremely Flat Surface by Spin-Coating
- Formation of c-Axis-Oriented Bi_4Ti_3O_ Films with Extremely Flat Surface by Spin-Coating
- A Novel Clean Ti Salicide Process Using Grooved Gate Structure
- Optimization of the Amorphous Layer Thickness and the Junction Depth in the Preamorphization Method for Shallow-Junction Formation
- Effects of Ion Etching and Annealing in O_2 Atmosphere Following Ion Etching on Properties and Chemistry of Sr_Bi_Ta_2O_ Thin Films
- MOS Gate Etching Using an Advanced Magnetron Etching System : Etching and Deposition Technology
- Thermal Stability of Interconnect of TiN/Cu/TiN Multilayered Structure
- A New Mechanism of Failure in Silicon p^+/n Junction Induced by Diffusion Barrier Metals
- Submicron Ferroelectric Capacitors Fabricated by Chemical Mechanical Polishing Process for High-Density Ferroelectric Memories
- Submicron Ferroelectric Capacitors Fabricated by CMP Process for High-Density FeRAMs
- Anomalously Enhanced Boron Diffusion in the Base of SiGe HBTs Induced by Phosphorus Implants into Polysilicon Emitters
- Copper Interconnects Fabricated by Dry Etching Process
- Self-Aligned SiGe HBTs with Doping Level Inversion Using Selective Epitaxy (Special Issue on Ultra-High-Speed IC and LSI Technology)
- High-Reliability Copper Interconnects through Dry Etchirng Process
- Effects of Contact-Hole-Etching Damage on Aluminum Chemical Vapor Deposition