High-Performance Solid-Phase Crystallized Polycrystalline Silicon Thin-Film Transistors with Floating-Channel Structure

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概要

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• High-performance solid-phase crystallized polycrystalline silicon thin-film transistors with a floating-channel active region (FC poly-Si TFTs) are proposed in this study. A high-quality poly-Si channel film accompanied by a larger grain size and fewer microstructural defects could be obtained. Compared with the conventional poly-Si TFTs (CN poly-Si TFTs), the fabricated FC poly-Si TFTs exhibit superior electrical characteristics, including lower threshold voltage, higher field-effect mobility, and lower trap state density. These electrical performance improvements could be attributed to the fact that the $\alpha$-Si film with a floating-channel structure can relieve the stress generated from the crystallization process accompanying the trap state density reduction and grain size enhancement. In addition, the FC poly-Si TFTs also exhibit improved hot-carrier stress immunity due to the reduced weak Si–H bonds from fewer grain boundaries in the poly-Si channel. Therefore, the proposed FC poly-Si TFTs can be easily fabricated by conventional solid-phase crystallization, and suitable for future high-performance flat-panel display applications.

• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
• 2008-04-25

著者

• Chang Chia-wen

  Institute Of Electronics National Chiao-tung University

• Liao Ta-chuan

  Institute Of Electronics National Chiao Tung University

• Deng Chih-kang

  Institute Of Electronics National Chiao-tung University

• Lei Tan-fu

  Institute And Department Of Electronics Engineering National Chiao Tung University

• Deng Chih-Kang

  Institute of Electronics, National Chiao Tung University, Hsinchu 30010, Taiwan

• Liao Ta-Chuan

  Institute of Electronics, National Chiao Tung University, Hsinchu 30010, Taiwan

• Lei Tan-Fu

  Institute of Electronics, National Chiao Tung University, Hsinchu 30010, Taiwan

• Chang Che-Lun

  Institute of Electronics, National Chiao Tung University, Hsinchu 30010, Taiwan

関連論文

• Combined Negative Bias Temperature Instability and Hot Carrier Stress Effects in Low Temperature Poly-Si Thin Film Transistors
• A Novel Process-Compatible Floating Channel Crystallization Technique to Fabricate High-Performance Poly-Si TFTs
• Improvement of Electrical Characteristics for Novel Fluorine-Incorporated Poly-Si TFTs with TiN Gate Electrode and Pr_2O_3 Gate Dielectric
• Novel Vacuum Encapsulation Applied for Improving Short-Channel Immunity on Poly-Si Thin Film Transistors
• Fringing Electric Field Effect on 65-nm-Node Fully Depleted Silicon-on-Insulator Devices
• The Characteristics and Reliability of Multi-channel Poly-Si TFTs
• Optimization on Layout Structures of LTPS TFTs for On-Panel ESD Protection Design
• NBTI-Stress Induced Grain-Boundary Degradation in Low-Temperature Poly-Si Thin-Film Transistors
• Characteristics of Polycrystalline Silicon Thin-Film Transistors with Electrical Source/Drain Extensions Induced by a Bottom Sub-Gate
• Electrical Enhancement of Polycrystalline Silicon Thin-Film Transistors Using Fluorinated Silicate Glass Passivation Layer
• Nonvolatile Flash Memory Devices Using CeO2 Nanocrystal Trapping Layer for Two-Bit per Cell Applications
• Electrical Properties of High-$\kappa$ Praseodymium Oxide Polycrystalline Silicon Thin-Film Transistors with Nitrogen Implantation
• Nonvolatile Memory Characteristics with Embedded Hemispherical Silicon Nanocrystals
• High-$\kappa$ Material Sidewall with Source/Drain-to-Gate Non-overlapped Structure for Low Standby Power Applications
• High-Performance Solid-Phase Crystallized Polycrystalline Silicon Thin-Film Transistors with Floating-Channel Structure

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