Optimization on Layout Structures of LTPS TFTs for On-Panel ESD Protection Design
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概要
- 論文の詳細を見る
- 2006-09-13
著者
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Ker Ming-dou
Institute Of Electronics National Chiao-tung University
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Deng Chih-kang
Institute Of Electronics National Chiao-tung University
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Chung Jie-yao
Institute Of Electronics National Chiao-tung University
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SUN Wein-Town
AU Optronics Corporation, Science-Based Industrial Park
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Sun Wein-town
Au Optronics Corporation Science-based Industrial Park
関連論文
- Optimization on Layout Structures of LTPS TFTs for On-Panel ESD Protection Design
- Electrical Enhancement of Polycrystalline Silicon Thin-Film Transistors Using Fluorinated Silicate Glass Passivation Layer
- Electrical Properties of High-$\kappa$ Praseodymium Oxide Polycrystalline Silicon Thin-Film Transistors with Nitrogen Implantation
- High-Performance Solid-Phase Crystallized Polycrystalline Silicon Thin-Film Transistors with Floating-Channel Structure