室温プロセスによるフレキシブル基板上酸化亜鉛薄膜トランジスタの作製

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ZnO thin-film transistors (ZnO-TFTs) on flexible substrates with SiO2/TiO2 buffer layers were fabricated at room temperature process. A SiO2 layer of 200nm as a bottom oxide buffer was grown on PEN plastic substrates by an electron beam deposition. A 50nm TiO2 buffer layer and a 40nm ZnO film were grown by a pulsed laser deposition (PLD) in continuously at room temperature. The TiO2 thin layer between the ZnO thin film and the SiO2 buffer layer provided a better adhesion, and demonstrated absence of in-plane disoriented grains without cracks. Top-gate type ZnO-TFTs were fabricated using the SiO2/TiO2 buffer layer, a transconductance, gm of 1.7mS/mm, a drain current on/off ratio of 2.4 × 106 and a threshold voltage VTH of -1.1V were obtained for a gate length LG of 2μm. When compared with a SiO2 buffer layer, a threshold voltage shift was about 1V in a positive direction, a higher voltage operation VDS of 5V and a gate leakage current IG of a few pA were obtained from a SiO2/TiO2 buffer layer ZnO-TFT. Furthermore, the ZnO-TFT was measured with bent to a curvature radius of 8.5mm. The I-V characteristics were therefore not changed drastically by bending and after returning. In order to improve the gm, the bottom-gate type ZnO-TFTs were also fabricated. The gm of 12.5mS/mm was obtained at gate length LG of 20μm. A transconductance, gm was improved by applying the bottom-gate type TFT, that is the gm became larger about 10times than that of the top-gate type TFT. From results of the bending experiments at curvature radius of 10mm, 20mm and 30mm. it was confirmed that the characteristics were not changed despite the bending and after returning for a short gate length devices.

室温プロセスによるフレキシブル基板上酸化亜鉛薄膜トランジスタの作製

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