Design Methods of Radix Converters Using Arithmetic Decompositions(Computer Components)

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概要

• 論文の詳細を見る

• In arithmetic circuits for digital signal processing, radixes other than two are often used to make circuits faster. In such cases, radix converters are necessary. However, in general, radix converters tend to be complex. This paper considers design methods for p-nary to binary converters. First, it considers Look-Up Table (LUT) cascade realizations. Then, it introduces a new design technique called arithmetic decomposition by using LUTs and adders. Finally, it compares the amount of hardware and performance of radix converters implemented by FPGAs. 12-digit ternary to binary converters on Cyclone II FPGAs designed by the proposed method are faster than ones by conventional methods.

• 社団法人電子情報通信学会の論文
• 2007-06-01

著者

• SASAO Tsutomu

  Department of Computer Science and Electronics, Kyushu Institute of Technology

• MATSUURA Munehiro

  Department of Computer Science and Electronics, Kyushu Institute of Technology

• IGUCHI Yukihiro

  Department of Computer Science, Meiji University

• Sasao T

  Department Of Computer Science And Electronics Kyushu Institute Of Technology

• Sasao Tsutomu

  Department Of Computer Science And Electronics Kyushu Institute Of Technology

• Iguchi Y

  Department Of Computer Science Meiji University

• Iguchi Yukihiro

  Department Of Computer Science And Electronics Kyushu Institute Of Technology

• MATSUURA Munehiro

  Kyushu Institute of Technology

• Matsuura Munehiro

  Department Of Computer Science And Electronics Kyushu Institute Of Technology

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