MATSUURA Munehiro | Kyushu Institute of Technology
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概要
関連著者
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MATSUURA Munehiro
Kyushu Institute of Technology
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SASAO Tsutomu
Department of Computer Science and Electronics, Kyushu Institute of Technology
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MATSUURA Munehiro
Department of Computer Science and Electronics, Kyushu Institute of Technology
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Sasao T
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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Matsuura Munehiro
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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NAKAHARA Hiroki
Department of Computer Science and Electronics, Kyushu Institute of Technology
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IGUCHI Yukihiro
Department of Computer Science, Meiji University
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Sasao Tsutomu
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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Iguchi Y
Department Of Computer Science Meiji University
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Nakahara Hiroki
Kyushu Institute Of Technology
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Iguchi Yukihiro
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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Nakahara Hiroki
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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Sasao Tsutomu
Kyushu Inst. Of Technol. Iizuka‐shi Jpn
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BUTLER Jon
海軍大学院大学
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Butler Jon
Naval Postgraduate School Ca Usa
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KAWAMURA Yoshifumi
Renesas Technology Corp.
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Nakamura K
Tokyo Inst. Technol. Tokyo Jpn
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Sasao Tsutomu
Center For Microelectronic Systems Kyushu Institute Of Technology
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Kawamura Yoshifumi
Renesas Electronics Corp.
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NAKAMURA Kazuyuki
Kyushu Institute of Technology
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TANAKA Katsumasa
Kyushu Institute of Technology
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YOSHIZUMI Kenichi
Kyushu Institute of Technology
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IGUCHI Yukihiro
Meiji University
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Nagayama Shinobu
Department Of Computer And Network Engineering Hiroshima City University
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Nagayama Shinobu
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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NAGAYAMA Shinobu
Department of Computer and Network Engineering, Hiroshima City University
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BUTLER Jon
Department of Electrical and Computer Engineering, Naval Postgraduate School
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Butler Jon
Department Of Electrical And Computer Engineering Naval Postgraduate School
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Sasao Tsutomu
The Department Of Computer Science And Electronics Kyushu Institute Of Technology
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Butler Jon
Naval Postgraduate School
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QIN Hui
Department of Computer Science and Electronics, Kyushu Institute of Technology
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NAKAMURA Kazuyuki
Center for Microelectronic Systems, Kyushu Institute of Technology
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QIN Hui
the Department of Computer Science and Electronics, Kyushu Institute of Technology
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IGUCHI Yukihiro
the Department of Computer Science, Meiji University
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MATSUURA Munehiro
the Department of Computer Science and Electronics, Kyushu Institute of Technology
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Qin Hui
The Department Of Computer Science And Electronics Kyushu Institute Of Technology
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Nakamura Kazuyuki
Center For Microelectronic Systems Kyushu Institute Of Technology
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Nakamura Kazuyuki
Kyushu Institute of Technology, 680-4 Kawazu, Iizuka, Fukuoka 820-8502, Japan
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Matsuura Munehiro
Kyushu Institute of Technology, 680-4 Kawazu, Iizuka, Fukuoka 820-8502, Japan
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Iguchi Yukihiro
Meiji University, 1-1-1 Higashimita, Kawasaki 214-8571, Japan
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Sasao Tsutomu
Kyushu Institute of Technology, 680-4 Kawazu, Iizuka, Fukuoka 820-8502, Japan
著作論文
- Bi-Partition of Shared Binary Decision Diagrams(Special Section on VLSI Design and CAD Algorithms)
- A Quaternary Decision Diagram Machine : Optimization of Its Code
- A Parallel Branching Program Machine for Sequential Circuits : Implementation and Evaluation
- A Memory-Based Programmable Logic Device Using a Look-Up Table Cascade with Synchronous SRAMs
- A Realization of Multiple-Output Functions by a Look-Up Table Ring(Logic Synthesis)(VLSI Design and CAD Algorithms)
- Design Methods of Radix Converters Using Arithmetic Decompositions(Computer Components)
- Area-Time Complexities of Multi-Valued Decision Diagrams(Discrete Mathematics and Its Applications)
- On Properties of Kleene TDDs(Special Issue on Test and Diagnosis of VLSI)
- A PC-Based Logic Simulator Using a Look-Up Table Cascade Emulator(Simulation and Verification,VLSI Design and CAD Algorithms)
- A Design Algorithm for Sequential Circuits Using LUT Rings(Logic Synthesis, VLSI Design and CAD Algorithms)
- A Design Method of a Regular Expression Matching Circuit Based on Decomposed Automaton
- A Memory-Based Programmable Logic Device Using Look-Up Table Cascade with Synchronous Static Random Access Memories