A Memory-Based Programmable Logic Device Using a Look-Up Table Cascade with Synchronous SRAMs
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概要
- 論文の詳細を見る
- 2005-09-13
著者
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SASAO Tsutomu
Department of Computer Science and Electronics, Kyushu Institute of Technology
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NAKAHARA Hiroki
Department of Computer Science and Electronics, Kyushu Institute of Technology
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MATSUURA Munehiro
Department of Computer Science and Electronics, Kyushu Institute of Technology
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IGUCHI Yukihiro
Department of Computer Science, Meiji University
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Nakamura K
Tokyo Inst. Technol. Tokyo Jpn
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Sasao T
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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Sasao Tsutomu
Kyushu Inst. Of Technol. Iizuka‐shi Jpn
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Iguchi Y
Department Of Computer Science Meiji University
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Nakahara Hiroki
Kyushu Institute Of Technology
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MATSUURA Munehiro
Kyushu Institute of Technology
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NAKAMURA Kazuyuki
Kyushu Institute of Technology
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TANAKA Katsumasa
Kyushu Institute of Technology
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YOSHIZUMI Kenichi
Kyushu Institute of Technology
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IGUCHI Yukihiro
Meiji University
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