SASAO Tsutomu | Department of Computer Science and Electronics, Kyushu Institute of Technology
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概要
- SASAO Tsutomuの詳細を見る
- 同名の論文著者
- Department of Computer Science and Electronics, Kyushu Institute of Technologyの論文著者
関連著者
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SASAO Tsutomu
Department of Computer Science and Electronics, Kyushu Institute of Technology
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Sasao Tsutomu
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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MATSUURA Munehiro
Department of Computer Science and Electronics, Kyushu Institute of Technology
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Sasao T
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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MATSUURA Munehiro
Kyushu Institute of Technology
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Matsuura Munehiro
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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NAKAHARA Hiroki
Department of Computer Science and Electronics, Kyushu Institute of Technology
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IGUCHI Yukihiro
Department of Computer Science, Meiji University
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Iguchi Y
Department Of Computer Science Meiji University
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Sasao Tsutomu
Kyushu Inst. Of Technol. Iizuka‐shi Jpn
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NAGAYAMA Shinobu
Department of Computer and Network Engineering, Hiroshima City University
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BUTLER Jon
Department of Electrical and Computer Engineering, Naval Postgraduate School
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Nakahara Hiroki
Kyushu Institute Of Technology
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Nagayama Shinobu
Department Of Computer And Network Engineering Hiroshima City University
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Butler Jon
Department Of Electrical And Computer Engineering Naval Postgraduate School
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Iguchi Yukihiro
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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Nakahara Hiroki
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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KAWAMURA Yoshifumi
Renesas Technology Corp.
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Debnath Debatosh
Department Of Computer Science And Engineering Oakland University
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Debnath Debatosh
Department Of Computer Science And Electronics Faculty Of Computer Science And Systems Engineering K
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BUTLER Jon
海軍大学院大学
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Butler Jon
Naval Postgraduate School Ca Usa
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Nakamura K
Tokyo Inst. Technol. Tokyo Jpn
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Sasao Tsutomu
The Department Of Computer Science And Electronics Kyushu Institute Of Technology
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Sasao Tsutomu
Center For Microelectronic Systems Kyushu Institute Of Technology
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HASAN BABU
Department of Computer Science and Electronics, Kyushu Institute of Technology
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Kawamura Yoshifumi
Renesas Electronics Corp.
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Nagayama Shinobu
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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QIN Hui
the Department of Computer Science and Electronics, Kyushu Institute of Technology
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IGUCHI Yukihiro
the Department of Computer Science, Meiji University
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Hasan Babu
Department Of Computer Science And Electronics Kyushu Institute Of Technology
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Qin Hui
The Department Of Computer Science And Electronics Kyushu Institute Of Technology
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Debnath Debatosh
Oakland Univ. Michigan Usa
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Butler Jon
Naval Postgraduate School
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NAKAMURA Kazuyuki
Kyushu Institute of Technology
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TANAKA Katsumasa
Kyushu Institute of Technology
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YOSHIZUMI Kenichi
Kyushu Institute of Technology
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IGUCHI Yukihiro
Meiji University
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QIN Hui
Department of Computer Science and Electronics, Kyushu Institute of Technology
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NAKAMURA Kazuyuki
Center for Microelectronic Systems, Kyushu Institute of Technology
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MATSUURA Munehiro
the Department of Computer Science and Electronics, Kyushu Institute of Technology
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Nakamura Kazuyuki
Center For Microelectronic Systems Kyushu Institute Of Technology
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SYAFALNI Infall
Department of Computer Science and Electronics, Kyushu Institute of Technology
著作論文
- A Systematic Design Method for Two-Variable Numeric Function Generators Using Multiple-Valued Decision Diagrams
- Compact Numerical Function Generators Based on Quadratic Approximation : Architecture and Synthesis Method(Circuit Synthesis,VLSI Design and CAD Algorithms)
- A Parallel Branching Program Machine for Sequential Circuits: Implementation and Evaluation
- Bi-Partition of Shared Binary Decision Diagrams(Special Section on VLSI Design and CAD Algorithms)
- Time-Division Multiplexing Realizations of Multiple-Output Functions Based on Shared Multi-Terminal Multiple-Valued Decision Diagrams (Special Issue on Multiple-Valued Logic and Its Applications)
- Design Method for Numerical Function Generators Using Recursive Segmentation and EVBDDs(Logic Synthesis and Verification,VLSI Design and CAD Algorithms)
- Exact Minimization of FPRMs for Incompletely Specified Functions by Using MTBDDs(Logic Synthesis, VLSI Design and CAD Algorithms)
- A New Equivalence Relation of Logic Functions and Its Application in the Design of AND-OR-EXOR Networks(Discrete Mathematics and Its Applications)
- BDD Representation for Incompletely Specified Multiple-Output Logic Functions and Its Applications to the Design of LUT Cascades(Logic Synthesis and Verification,VLSI Design and CAD Algorithms)
- A Systematic Design Method for Two-Variable Numeric Function Generators Using Multiple-Valued Decision Diagrams
- A Quaternary Decision Diagram Machine : Optimization of Its Code
- Efficient Computation of Canonical Form under Variable Permutation and Negation for Boolean Matching in Large Libraries(Logic Synthesis,VLSI Design and CAD Algorithms)
- A Parallel Branching Program Machine for Sequential Circuits : Implementation and Evaluation
- A Memory-Based Programmable Logic Device Using a Look-Up Table Cascade with Synchronous SRAMs
- A Realization of Multiple-Output Functions by a Look-Up Table Ring(Logic Synthesis)(VLSI Design and CAD Algorithms)
- Design Methods of Radix Converters Using Arithmetic Decompositions(Computer Components)
- A Design of AES Encryption Circuit with 128-bit Keys Using Look-Up Table Ring on FPGA(Computer Components)
- Area-Time Complexities of Multi-Valued Decision Diagrams(Discrete Mathematics and Its Applications)
- On Properties of Kleene TDDs(Special Issue on Test and Diagnosis of VLSI)
- Representations of Multiple-Output Functions Using Binary Decision Diagrams for Characteristic Functions (Special Section on VLSI Design and CAD Algorithms)
- A PC-Based Logic Simulator Using a Look-Up Table Cascade Emulator(Simulation and Verification,VLSI Design and CAD Algorithms)
- A Design Algorithm for Sequential Circuits Using LUT Rings(Logic Synthesis, VLSI Design and CAD Algorithms)
- A Design Method of a Regular Expression Matching Circuit Based on Decomposed Automaton
- On the Numbers of Products in Prefix SOPs for Interval Functions